RE: [PATCH, ARM] Fix PR56797

["Greta Yorsh" <greta dot yorsh at arm dot com>]

Ok to backport to gcc4.8?

I'm attaching an updated version - just fixed a spelling error in the
comment. 

Thanks,
Greta

gcc/ChangeLog

	PR target/56797
	* config/arm/arm.c (load_multiple_sequence): Require SP
        as base register for loads if SP is in the register list.

> -----Original Message-----
> From: Richard Earnshaw
> Sent: 19 April 2013 12:34
> To: Greta Yorsh
> Cc: GCC Patches; raj.khem@gmail.com; Ramana Radhakrishnan
> Subject: Re: [PATCH, ARM] Fix PR56797
> 
> On 19/04/13 10:34, Greta Yorsh wrote:
> > Fix PR56797
> > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56797
> >
> > The problem is that peephole optimizer thinks it can generate an ldm,
> but
> > the pattern for ldm no longer matches, because after r188738 it
> requires
> > that if one of the destination registers is SP then the base register
> must
> > be SP, and it's not SP in the test case.
> >
> > The test case fails on armv5t but doesn't fail on armv6t2 or armv7-a
> because
> > peephole doesn't trigger there (because there is a different epilogue
> > sequence). It looks like a latent problem for other architecture or
> CPUs.
> >
> > This patch adds this condition to the peephole optimizer.
> >
> > No regression on qemu for arm-none-eabi and fixes the test reported
> in the
> > PR. I couldn't minimize the test sufficiently to include it in the
> > testsuite.
> >
> > Ok for trunk?
> >
> > Thanks,
> > Greta
> >
> > gcc/
> >
> > 2013-04-18  Greta Yorsh  <Greta.Yorsh@arm.com>
> >
> > 	PR target/56797
> > 	* config/arm/arm.c (load_multiple_sequence): Require SP
> >          as base register for loads if SP is in the register list.
> >
> 
> OK.
> 
> R.

Attachment: pr56797-ldm-peep-sp.patch.txt
Description: Text document