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Re: [PATCH, AArch64] Negate with Compare instruction
- From: "Hurugalawadi, Naveen" <Naveen dot Hurugalawadi at caviumnetworks dot com>
- To: Richard Earnshaw <rearnsha at arm dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 22 Apr 2013 07:15:15 +0000
- Subject: Re: [PATCH, AArch64] Negate with Compare instruction
- References: <c1cc5b8796434ffe9b7f8f9291af7850 at SN2PR07MB029 dot namprd07 dot prod dot outlook dot com>,<51714F69 dot 9050401 at arm dot com>
Hi,
>> This and the preceding scan are the same pattern. So if either passes
>> you'll fail to detect a failure in the other.
Thanks for the suggestion.
Please find attached the modified patch as per your suggestions.
Please review the same and let me know if there should be any
further modifications in it.
Thanks,
Naveen
--- gcc/config/aarch64/aarch64.md 2013-04-17 11:18:29.453576713 +0530
+++ gcc/config/aarch64/aarch64.md 2013-04-22 11:33:58.355695801 +0530
@@ -1982,6 +1982,27 @@
(set_attr "mode" "SI")]
)
+(define_insn "*ngc<mode>"
+ [(set (match_operand:GPI 0 "register_operand" "=r")
+ (minus:GPI (neg:GPI (ltu:GPI (reg:CC CC_REGNUM) (const_int 0)))
+ (match_operand:GPI 1 "register_operand" "r")))]
+ ""
+ "ngc\\t%<w>0, %<w>1"
+ [(set_attr "v8type" "adc")
+ (set_attr "mode" "<MODE>")]
+)
+
+(define_insn "*ngcsi_uxtw"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (zero_extend:DI
+ (minus:SI (neg:SI (ltu:SI (reg:CC CC_REGNUM) (const_int 0)))
+ (match_operand:SI 1 "register_operand" "r"))))]
+ ""
+ "ngc\\t%w0, %w1"
+ [(set_attr "v8type" "adc")
+ (set_attr "mode" "SI")]
+)
+
(define_insn "*neg<mode>2_compare0"
[(set (reg:CC_NZ CC_REGNUM)
(compare:CC_NZ (neg:GPI (match_operand:GPI 1 "register_operand" "r"))
--- gcc/testsuite/gcc.target/aarch64/ngc.c 1970-01-01 05:30:00.000000000 +0530
+++ gcc/testsuite/gcc.target/aarch64/ngc.c 2013-04-22 11:34:44.163696831 +0530
@@ -0,0 +1,66 @@
+/* { dg-do run } */
+/* { dg-options "-O2 --save-temps -fno-inline" } */
+
+extern void abort (void);
+typedef unsigned int u32;
+
+u32
+ngc_si (u32 a, u32 b, u32 c, u32 d)
+{
+ a = -b - (c < d);
+ return a;
+}
+
+typedef unsigned long long u64;
+
+u64
+ngc_si_tst (u64 a, u32 b, u32 c, u32 d)
+{
+ a = -b - (c < d);
+ return a;
+}
+
+u64
+ngc_di (u64 a, u64 b, u64 c, u64 d)
+{
+ a = -b - (c < d);
+ return a;
+}
+
+int
+main ()
+{
+ int x;
+ u64 y;
+
+ x = ngc_si (29, 4, 5, 4);
+ if (x != -4)
+ abort ();
+
+ x = ngc_si (1024, 2, 20, 13);
+ if (x != -2)
+ abort ();
+
+ y = ngc_si_tst (0x130000029ll, 32, 50, 12);
+ if (y != 0xffffffe0)
+ abort ();
+
+ y = ngc_si_tst (0x5000500050005ll, 21, 2, 14);
+ if (y != 0xffffffea)
+ abort ();
+
+ y = ngc_di (0x130000029ll, 0x320000004ll, 0x505050505ll, 0x123123123ll);
+ if (y != 0xfffffffcdffffffc)
+ abort ();
+
+ y = ngc_di (0x5000500050005ll,
+ 0x2111211121112ll, 0x0000000002020ll, 0x1414575046477ll);
+ if (y != 0xfffdeeedeeedeeed)
+ abort ();
+
+ return 0;
+}
+
+/* { dg-final { scan-assembler-times "ngc\tw\[0-9\]+, w\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler-times "ngc\tx\[0-9\]+, x\[0-9\]+" 1 } } */
+/* { dg-final { cleanup-saved-temps } } */