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Re: [PATCH, AARCH64] Fix unrecognizable insn issue
- From: Andrew Pinski <pinskia at gmail dot com>
- To: Zhenqiang Chen <zhenqiang dot chen at linaro dot org>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>, Marcus Shawcroft <marcus dot shawcroft at arm dot com>
- Date: Wed, 10 Apr 2013 01:05:08 -0700
- Subject: Re: [PATCH, AARCH64] Fix unrecognizable insn issue
- References: <CACgzC7ADK2m2u8P9SOvjVB+=wsV2UwRHsRWvAWDtxhyao55AAg at mail dot gmail dot com>
On Wed, Apr 10, 2013 at 1:02 AM, Zhenqiang Chen
<zhenqiang.chen@linaro.org> wrote:
> Hi,
>
> During expand, function aarch64_vcond_internal inverses some CMP, e.g.
>
> a LE b -> b GE a
>
> But if "b" is "CONST0_RTX", "b GE a" will be an illegal insn.
>
> Refer https://bugs.launchpad.net/linaro-toolchain-binaries/+bug/1163942
> for detail about the issue.
>
> The patch is to make "b" a register when inversing LE.
>
> Is it OK for trunk, 4.8 and arm/aarch64-4.7-branch?
Can you add a testcase also? It would be best to add one that ia a
reduced testcase.
Also can you expand on what is going on here? There is not enough
information in either this email or the bug report to figure out if
this is the correct patch.
Thanks,
Andrew Pinski
>
> Thanks!
> -Zhenqiang
>
> ChangeLog:
> 2013-04-10 Zhenqiang Chen <zhenqiang.chen@linaro.org>
>
> * config/aarch64/aarch64-simd.md (aarch64_vcond_internal): Set
> operands[5] to register when inversing LE.
>
> diff --git a/gcc/config/aarch64/aarch64-simd.md
> b/gcc/config/aarch64/aarch64-simd.md
> index 92dcfc0..d08d23a 100644
> --- a/gcc/config/aarch64/aarch64-simd.md
> +++ b/gcc/config/aarch64/aarch64-simd.md
> @@ -1657,6 +1657,8 @@
> complimentary_comparison = gen_aarch64_cmgt<mode>;
> break;
> case LE:
> + if (!REG_P (operands[5]))
> + operands[5] = force_reg (<MODE>mode, operands[5]);
> case UNLE:
> inverse = 1;
> /* Fall through. */
On Wed, Apr 10, 2013 at 1:02 AM, Zhenqiang Chen
<zhenqiang.chen@linaro.org> wrote:
> Hi,
>
> During expand, function aarch64_vcond_internal inverses some CMP, e.g.
>
> a LE b -> b GE a
>
> But if "b" is "CONST0_RTX", "b GE a" will be an illegal insn.
>
> Refer https://bugs.launchpad.net/linaro-toolchain-binaries/+bug/1163942
> for detail about the issue.
>
> The patch is to make "b" a register when inversing LE.
>
> Is it OK for trunk, 4.8 and arm/aarch64-4.7-branch?
>
> Thanks!
> -Zhenqiang
>
> ChangeLog:
> 2013-04-10 Zhenqiang Chen <zhenqiang.chen@linaro.org>
>
> * config/aarch64/aarch64-simd.md (aarch64_vcond_internal): Set
> operands[5] to register when inversing LE.
>
> diff --git a/gcc/config/aarch64/aarch64-simd.md
> b/gcc/config/aarch64/aarch64-simd.md
> index 92dcfc0..d08d23a 100644
> --- a/gcc/config/aarch64/aarch64-simd.md
> +++ b/gcc/config/aarch64/aarch64-simd.md
> @@ -1657,6 +1657,8 @@
> complimentary_comparison = gen_aarch64_cmgt<mode>;
> break;
> case LE:
> + if (!REG_P (operands[5]))
> + operands[5] = force_reg (<MODE>mode, operands[5]);
> case UNLE:
> inverse = 1;
> /* Fall through. */