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Re: [PATCH,ARM][3/n] Split various patterns


On Mon, Feb 18, 2013 at 6:38 PM, Greta Yorsh <greta.yorsh@arm.com> wrote:
> Convert define_insn into define_insn_and_split for various patterns that
> output multiple assembly instructions.
>
> It appears that preparation statements in define_insn_and_split sometimes
> are called with which_alternative set to -1 even after reload. Therefore,
> preparation statements use conditions on the operands instead of
> which_alternative.
>
> gcc/
>
> 2013-02-14  Greta Yorsh  <Greta.Yorsh@arm.com>
>
>       * config/arm/arm.md (andsi_iorsi3_notsi): Convert define_insn into
>       define_insn_and_split.
>       (arm_negdi2,arm_abssi2,arm_neg_abssi2): Likewise.
>       (arm_cmpdi_insn,arm_cmpdi_unsigned): Likewise.

>-(define_insn "*arm_neg_abssi2"
>+(define_insn_and_split "*arm_neg_abssi2"
>   [(set (match_operand:SI 0 "s_register_operand" "=r,&r")
> 	(neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" "0,r"))))
>    (clobber (reg:CC CC_REGNUM))]
>   "TARGET_ARM"
>-  "@
>-   cmp\\t%0, #0\;rsbgt\\t%0, %0, #0
>-   eor%?\\t%0, %1, %1, asr #31\;rsb%?\\t%0, %0, %1, asr #31"
>+  "#"
> +  {
> +   /* if (which_alternative == 0) */
> +   if (REGNO(operands[0]) == REGNO(operands[1]))
> +     {
> +      /* Emit the pattern:
> +         cmp\\t%0, #0\;rsblt\\t%0, %0, #0
> +         [(set (reg:CC CC_REGNUM)
> +               (compare:CC (match_dup 0) (const_int 0)))
> +          (cond_exec (lt:CC (reg:CC CC_REGNUM) (const_int 0))
> +                     (set (match_dup 0) (minus:SI (const_int 0) (match_dup 1))))]
> +      */
> +      emit_insn (gen_rtx_SET (VOIDmode,
> +                              gen_rtx_REG (CCmode, CC_REGNUM),
> +                              gen_rtx_COMPARE (CCmode, operands[0], const0_rtx)));
> +      emit_insn (gen_rtx_COND_EXEC (VOIDmode,
> +                                    (gen_rtx_LT (SImode,
> +                                                 gen_rtx_REG (CCmode, CC_REGNUM),
> +                                                 const0_rtx)),
> +                                    (gen_rtx_SET (VOIDmode,
> +                                                  operands[0],
> +                                                  (gen_rtx_MINUS (SImode,
> +                                                                  const0_rtx,
> +                                                                  operands[1]))))));
> +      DONE;
> +     }
> +   else
> +     {
> +      /* Emit the pattern:
> +         alt1: eor%?\\t%0, %1, %1, asr #31\;sub%?\\t%0, %0, %1, asr #31
> +         [(set (match_dup 0)
> +               (xor:SI (match_dup 1)
> +                       (ashiftrt:SI (match_dup 1) (const_int 31))))
> +          (set (match_dup 0)
> +               (minus:SI (match_dup 0)
> +                      (ashiftrt:SI (match_dup 1) (const_int 31))))]
> +      */
> +      emit_insn (gen_rtx_SET (VOIDmode,
> +                              operands[0],
> +                              gen_rtx_XOR (SImode,
> +                                           gen_rtx_ASHIFTRT (SImode,
> +                                                             operands[1],
> +                                                             GEN_INT (31)),
> +                                           operands[1])));
> +      emit_insn (gen_rtx_SET (VOIDmode,
> +                              operands[0],
> +                              gen_rtx_MINUS (SImode,
> +                                             operands[0],
> +                                             gen_rtx_ASHIFTRT (SImode,
> +                                                               operands[1],
> +                                                               GEN_INT (31)))));
> +      DONE;
> +     }
> +  }

Sink the DONE to the common part.

Ok with that change.

regards
Ramana


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