Index: gcc.target/mips/mips.exp
===================================================================
--- gcc.target/mips/mips.exp	(revision 195578)
+++ gcc.target/mips/mips.exp	(working copy)
@@ -238,6 +238,7 @@ set mips_option_groups {
     fp "-mfp(32|64)"
     gp "-mgp(32|64)"
     long "-mlong(32|64)"
+    micromips "-mmicromips|-mno-micromips"
     mips16 "-mips16|-mno-mips16|-mflip-mips16"
     mips3d "-mips3d|-mno-mips3d"
     pic "-f(no-|)(pic|PIC)"
@@ -1246,6 +1247,10 @@ proc mips-dg-options { args } {
 	append extra_tool_flags " -DMIPS16=__attribute__((mips16))"
     }
 
+    if { [mips_have_test_option_p options "-mmicromips"] } {
+	append extra_tool_flags " -DMICROMIPS=__attribute__((micromips))"
+    }
+
     # Use our version of gcc-dg-test for this test.
     if { ![string equal [info procs "mips-gcc-dg-test"] ""] } {
 	rename gcc-dg-test mips-old-gcc-dg-test
@@ -1275,6 +1280,6 @@ proc mips-gcc-dg-test { prog do_what extra_tool_fl
 dg-init
 mips-dg-init
 gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.c]] \
-    "-DNOMIPS16=__attribute__((nomips16))"
+    "-DNOMIPS16=__attribute__((nomips16)) -DNOMICROMIPS=__attribute__((nomicromips)) -DNOCOMPRESSION=__attribute__((nocompression)) -DMICROMIPS=__attribute__((micromips))"
 mips-dg-finish
 dg-finish
Index: gcc.target/mips/umips-lwp-swp-1.c
===================================================================
--- gcc.target/mips/umips-lwp-swp-1.c	(revision 0)
+++ gcc.target/mips/umips-lwp-swp-1.c	(revision 0)
@@ -0,0 +1,19 @@
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+void MICROMIPS
+foo (long long l1, long long *l2)
+{
+  *l2 = l1;
+}
+
+long long MICROMIPS
+bar (long long d)
+{
+  register long long l1 asm ("$8") = d;
+  register long long l2 asm ("$12") = 0;
+  asm ("#foo" : "=r" (l1) : "r" (l1));
+  asm volatile ("#foo" :: "r" (l2));
+  return l1;
+}
+
+/* { dg-final { scan-assembler "\tswp" } */
Index: gcc.target/mips/umips-save-restore-1.c
===================================================================
--- gcc.target/mips/umips-save-restore-1.c	(revision 0)
+++ gcc.target/mips/umips-save-restore-1.c	(revision 0)
@@ -0,0 +1,19 @@
+/* Check that we can use the swm/lwm instructions.  */
+/* { dg-options "(-mmicromips)" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+#include <stdarg.h>
+
+int bar (int, int, int, int, int);
+
+MICROMIPS int
+foo (int n, int a, int b, int c, int d) 
+{
+  int i, j;
+
+  i = bar (n, a, b, c, d);
+  j = bar (n, a, b, c, d);
+  return i + j;
+}
+/* { dg-final { scan-assembler "\tswm\t" } } */
+/* { dg-final { scan-assembler "\tlwm\t" } } */
Index: gcc.target/mips/umips-lwp-swp-2.c
===================================================================
--- gcc.target/mips/umips-lwp-swp-2.c	(revision 0)
+++ gcc.target/mips/umips-lwp-swp-2.c	(revision 0)
@@ -0,0 +1,19 @@
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+void MICROMIPS
+foo (long long *l1, long long l2)
+{
+  *l1 = l2;
+}
+
+long long MICROMIPS
+bar (long long d)
+{
+  register long long l1 asm ("$8") = d;
+  register long long l2 asm ("$12") = 0;
+  asm ("#foo" : "=r" (l1) : "r" (l1));
+  asm volatile ("#foo" :: "r" (l2));
+  return l1;
+}
+
+/* { dg-final { scan-assembler "\tswp" } */
Index: gcc.target/mips/umips-save-restore-2.c
===================================================================
--- gcc.target/mips/umips-save-restore-2.c	(revision 0)
+++ gcc.target/mips/umips-save-restore-2.c	(revision 0)
@@ -0,0 +1,15 @@
+/* Check that we can use the save instruction to save spilled arguments.  */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+MICROMIPS void
+foo (int *a, int b, int c)
+{
+  asm volatile ("" ::: "$2", "$3", "$4", "$5", "$6", "$7", "$8",
+		"$9", "$10", "$11", "$12", "$13", "$14", "$15", "$16",
+		"$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24",
+		"$25", "$30", "memory");
+  a[b] = 1;
+  a[c] = 1;
+}
+/* { dg-final { scan-assembler "\tswm\t" } } */
+/* { dg-final { scan-assembler "\tlwm\t" } } */
Index: gcc.target/mips/umips-lwp-swp-volatile.c
===================================================================
--- gcc.target/mips/umips-lwp-swp-volatile.c	(revision 0)
+++ gcc.target/mips/umips-lwp-swp-volatile.c	(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do compile } */
+
+/* This test ensures that we do not generate microMIPS SWP or LWP
+   instructions when any component of the accessed memory is volatile; 
+   they are unsafe for such since they might cause replay of partial 
+   accesses if interrupted by an exception.  */
+
+static void set_csr (volatile void *p, int v)
+{
+  *(volatile int *) (p) = v;
+}
+
+static int get_csr (volatile void *p)
+{
+  return *(volatile int *) (p);
+}
+
+int main ()
+{
+  int i, q = 0, p = 0, r = 0;
+
+  for (i = 0; i < 20; i++)
+    {
+      set_csr ((volatile void *) 0xbf0100a8, 0xffff0002);
+      set_csr ((volatile void *) 0xbf0100a4, 0x80000008);
+    }
+
+  for (i = 0; i < 20; i++)
+    {
+      register int k, j;
+      k = get_csr ((volatile void *) 0xbf0100b8);
+      p += k;
+      j = get_csr ((volatile void *) 0xbf0100b4);
+      r += j;
+      q = j + k;
+    }
+  return q + r + p;
+}
+
+/* { dg-final { scan-assembler-not "\tswp\t\\\$" } } */
+/* { dg-final { scan-assembler-not "\tlwp\t\\\$" } } */
Index: gcc.target/mips/umips-save-restore-3.c
===================================================================
--- gcc.target/mips/umips-save-restore-3.c	(revision 0)
+++ gcc.target/mips/umips-save-restore-3.c	(revision 0)
@@ -0,0 +1,13 @@
+/* Check that we can use the swm instruction to save $16, $17 and $31.  */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+void bar (void);
+
+MICROMIPS void
+foo (void)
+{
+  bar ();
+  asm volatile ("" ::: "$16", "$17");
+}
+/* { dg-final { scan-assembler "\tswm\t\\\$16-\\\$17,\\\$31" } } */
+/* { dg-final { scan-assembler "\tlwm\t\\\$16-\\\$17,\\\$31" } } */
Index: gcc.target/mips/umips-movep.c
===================================================================
--- gcc.target/mips/umips-movep.c	(revision 0)
+++ gcc.target/mips/umips-movep.c	(revision 0)
@@ -0,0 +1,18 @@
+/* Check that we can use the save instruction to save varargs.  */
+/* { dg-options "(-mmicromips)" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+#include <stdarg.h>
+
+long long bar (long long, long long);
+
+MICROMIPS long long
+foo (long long n, long long a)
+{
+  long long i, j;
+
+  i = bar (n, a);
+  j = bar (n, a);
+  return i + j;
+}
+/* { dg-final { scan-assembler "\tmovep\t" } } */
Index: gcc.c-torture/execute/ieee/ieee.exp
===================================================================
--- gcc.c-torture/execute/ieee/ieee.exp	(revision 195378)
+++ gcc.c-torture/execute/ieee/ieee.exp	(working copy)
@@ -54,6 +54,9 @@ if { [istarget "alpha*-*-*"]
      || [istarget "sh*-*-*"] } then {
   lappend additional_flags "-mieee"
 }
+if [istarget "mips*-sde-*"] then {
+  lappend additional_flags "-Wl,--defsym=__cs3_mips_float_type=2" "-lcs3-mips-cp1" "-lcs3-mips-fpemu"
+}
 
 # load support procs
 load_lib c-torture.exp
Index: ChangeLog
===================================================================
--- ChangeLog	(revision 195904)
+++ ChangeLog	(working copy)
@@ -1,3 +1,14 @@
+2012-02-08  Catherine Moore  <clm@codesourcery.com>
+
+	* gcc.target/mips/mips.exp: Add microMIPS support.
+	* gcc.target/mips/umips-lwp-swp-1.c: New test.
+	* gcc.target/mips/umips-save-restore-1.c: New test.
+	* gcc.target/mips/umips-lwp-swp-2.c: New test.
+	* gcc.target/mips/umips-save-restore-2.c: New test.
+	* gcc.target/mips/umips-lwp-swp-volatile.c: New test.
+	* gcc.target/mips/umips-save-restore-3.c: New test.
+	* gcc.target/mips/umips-movep.c: New test.
+
 2013-02-08  Vladimir Makarov  <vmakarov@redhat.com>
 
 	PR rtl-optimization/56246
