RE: [PATCH, i386]: AMD bdver3 enablement

["Gopalasubramanian, Ganesh" <Ganesh dot Gopalasubramanian at amd dot com>]

Hi

Changes done with respect to the review comments.
Conditionally setting "sseshuf" type attribute has been removed.
Instead new attribute is added and is included for other attribute calculations.

The patch is attached as (difflog.txt).
The new file (bdver3.md) describing the pipelines is also attached.

Bootstrapping and "make -k check" passes.

OK for upstream?

2012-11-09  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>

	bdver3 Enablement
	* gcc/doc/extend.texi: Add details about bdver3.
	* gcc/doc/invoke.texi: Add details about bdver3.
	* config.gcc (i[34567]86-*-linux* | ...): Add bdver3.
	(case ${target}): Add bdver3.
	* config/i386/i386.h (TARGET_BDVER3): New definition.
	* config/i386/i386.md (define_attr "cpu"): Add bdver3.
	* config/i386/sse.md (sseshuf): New type attribute.
	* config/i386/athlon.md (sseshuf):Likewise.
	* config/i386/atom.md (sseshuf):Likewise.
	* config/i386/ppro.md (sseshuf):Likewise.
	* config/i386/bdver1.md (sseshuf):Likewise.
	* config/i386/i386.opt (flag_dispatch_scheduler): Add bdver3.
	* config/i386/i386-c.c (ix86_target_macros_internal): Add
	bdver3 def_and_undef
	* config/i386/driver-i386.c (host_detect_local_cpu): Let
	-march=native recognize bdver3 processors.
	* config/i386/i386.c (struct processor_costs bdver3_cost): New.
	(m_BDVER3): New definition.
	(m_AMD_MULTIPLE): Includes m_BDVER3.
	(initial_ix86_tune_features): Add bdver3 tune.
	(processor_target_table): Add bdver3 entry.
	(static const char *const cpu_names): Add bdver3 entry.
	(software_prefetching_beneficial_p): Add bdver3.
	(ix86_option_override_internal): Add bdver3 instruction sets.
	(ix86_option_override_internal): Remove XSAVEOPT for bdver1 
	and bdver2.
	(ix86_issue_rate): Add bdver3.
	(ix86_adjust_cost): Add bdver3.
	(enum target_cpu_default): Add TARGET_CPU_DEFAULT_bdver3.
	(enum processor_type): Add PROCESSOR_BDVER3.
	* config/i386/bdver3.md: New file describing bdver3 pipelines.

Regards
Ganesh

-----Original Message-----
From: Uros Bizjak [mailto:ubizjak@gmail.com] 
Sent: Monday, November 05, 2012 1:37 PM
To: Gopalasubramanian, Ganesh
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH, i386]: AMD bdver3 enablement

On Mon, Nov 5, 2012 at 8:33 AM, Gopalasubramanian, Ganesh <Ganesh.Gopalasubramanian@amd.com> wrote:
> Couple of changes done with respect to the review comments.
>
> 1. sseshuf type attribute is handled in unit attribute calculation.
> 2. sseadd1 instruction attribute is handled in the new scheduler descriptions.
>
> The patch is attached as (patch.txt).
> The new file (bdver3.md) describing the pipelines is also attached.

-  [(set_attr "type" "sselog")
+  [(set (attr "type")
+     (if_then_else (eq_attr "cpu" "bdver3")
+        (const_string "sseshuf")
+        (const_string "sselog")))
    (set_attr "length_immediate" "1")
    (set_attr "prefix" "vex")
    (set_attr "mode" "V8SF")])
@@ -3911,7 +3914,10 @@
     }
 }
   [(set_attr "isa" "noavx,avx")
-   (set_attr "type" "sselog")
+   (set (attr "type")
+     (if_then_else (eq_attr "cpu" "bdver3")
+        (const_string "sseshuf")
+        (const_string "sselog")))
    (set_attr "length_immediate" "1")
    (set_attr "prefix" "orig,vex")
    (set_attr "mode" "V4SF")])
@@ -4018,7 +4024,27 @@
    vmovlps\t{%2, %1, %0|%0, %1, %2}
    %vmovlps\t{%2, %0|%0, %2}"
   [(set_attr "isa" "noavx,avx,noavx,avx,*")
-   (set_attr "type" "sselog,sselog,ssemov,ssemov,ssemov")
+   (set (attr "type")
+        (cond [(and (eq_attr "cpu" "bdver3")
+                 (eq_attr "alternative" "0"))
+                 (const_string "sseshuf")
+               (and (eq_attr "cpu" "bdver3")
+                 (eq_attr "alternative" "1"))
+                 (const_string "sseshuf")
+                 (eq_attr "alternative" "2")
+                 (const_string "ssemov")
+                 (eq_attr "alternative" "3")
+                 (const_string "ssemov")
+                 (eq_attr "alternative" "4")
+                 (const_string "ssemov")
+              (and (not (eq_attr "cpu" "bdver3"))
+                 (eq_attr "alternative" "0"))
+                 (const_string "sselog")
+              (and (not (eq_attr "cpu" "bdver3"))
+                 (eq_attr "alternative" "1"))
+                 (const_string "sselog")
+               ]
+               (const_string "*" )))
    (set_attr "length_immediate" "1,1,*,*,*")
    (set_attr "prefix" "orig,vex,orig,vex,maybe_vex")
    (set_attr "mode" "V4SF,V4SF,V2SF,V2SF,V2SF")]) @@ -4072,7 +4098,23 @@
    vbroadcastss\t{%1, %0|%0, %1}
    shufps\t{$0, %0, %0|%0, %0, 0}"
   [(set_attr "isa" "avx,avx,noavx")
-   (set_attr "type" "sselog1,ssemov,sselog1")
+   (set (attr "type")
+        (cond [(and (eq_attr "cpu" "bdver3")
+                 (eq_attr "alternative" "0"))
+                 (const_string "sseshuf")
+                (and (eq_attr "cpu" "bdver3")
+                 (eq_attr "alternative" "2"))
+                 (const_string "sseshuf")
+                (eq_attr "alternative" "1")
+                 (const_string "ssemov")
+               (and (not (eq_attr "cpu" "bdver3"))
+                 (eq_attr "alternative" "0"))
+                 (const_string "sselog1")
+               (and (not (eq_attr "cpu" "bdver3"))
+                 (eq_attr "alternative" "2"))
+                 (const_string "sselog1")
+               ]
+               (const_string "*" )))

Please don't conditionally change type attribute. Change sselog{,1} attribute unconditionally to sseshuf{,1} and handle them in the same way as sselog{,1}.

In other words, add new attributes to all places where original attributes are handled.

Otherwise, the patch looks good.

Uros.

Attachment: difflog.txt
Description: difflog.txt

Attachment: bdver3.md
Description: bdver3.md