Re: [PATCH 2/7] s390: Only use lhs zero_extract in word_mode

["Andreas Krebbel" <andreas at de dot ibm dot com>]

Hi,

I had to remove the insv pattern changes from that patch.  I
understand that you simplified the patterns since the generic RTL
expander only generates word mode zero extracts. However, we still
need the SImode variant for atomic operations so we cannot remove it.

The insv_z10 definition can still be simplified after adding the
bitsize mode attribute with one of your later patches so that change
will be moved to a later patch.

No regressions with that patch on s390x with -march=z196.

Feel free to apply.

Thanks!

Bye,

-Andreas-


 gcc/config/s390/s390.md |   17 !!!!!!!!!!!!!!!!!
 1 file changed, 17 modifications(!)

Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig
--- gcc/config/s390/s390.md
***************
*** 3525,3539 ****
    [(set_attr "op_type" "RIL")
     (set_attr "z10prop" "z10_fwd_E1")])
  
! ; Update the right-most 32 bit of a DI, or the whole of a SI.
! (define_insn "*insv_l<mode>_reg_extimm"
!   [(set (zero_extract:P (match_operand:P 0 "register_operand" "+d")
! 			(const_int 32)
! 			(match_operand 1 "const_int_operand" "n"))
! 	(match_operand:P 2 "const_int_operand" "n"))]
!   "TARGET_EXTIMM
!    && BITS_PER_WORD - INTVAL (operands[1]) == 32"
!   "iilf\t%0,%o2"
    [(set_attr "op_type" "RIL")
     (set_attr "z10prop" "z10_fwd_A1")])
  
--- 3525,3538 ----
    [(set_attr "op_type" "RIL")
     (set_attr "z10prop" "z10_fwd_E1")])
  
! ; Update the right-most 32 bit of a DI.
! (define_insn "*insv_l_di_reg_extimm"
!   [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+d")
! 			 (const_int 32)
! 			 (const_int 32))
! 	(match_operand:DI 1 "const_int_operand" "n"))]
!   "TARGET_EXTIMM"
!   "iilf\t%0,%o1"
    [(set_attr "op_type" "RIL")
     (set_attr "z10prop" "z10_fwd_A1")])