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Re: [PATCH, gcc/doc]: Document AMD btver2 enablement
- From: Gerald Pfeifer <gerald at pfeifer dot com>
- To: venkataramanan dot kumar at amd dot com
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Sat, 4 Aug 2012 20:53:43 +0200 (CEST)
- Subject: Re: [PATCH, gcc/doc]: Document AMD btver2 enablement
- References: <20120804173745.4816.23890.sendpatchset@adcelk01.amd.com>
On Sat, 4 Aug 2012, venkataramanan.kumar@amd.com wrote:
> Index: gcc/doc/extend.texi
> ===================================================================
> +@item btver1
> +AMD family 14h cpu.
CPU...
> @item amdfam15h
> AMD family 15h CPU.
...like you already had here. :-)
> +@item btver2
> +AMD family 16h cpu.
CPU.
> +@item btver2
> +CPUs based on AMD Family 16h cores with x86-64 instruction set support. (This
> +supersets MOVBE, F16C, BMI, AVX, PCL_MUL, AES, SSE4.2, SSE4.1, CX16, ABM,
> +SSE4A, SSSE3, SSE3, SSE2, SSE, MMX and 64-bit instruction set extensions.)
I could not find "supsersets" as a verb in my dictionary: how
about "includes"?
And I'd omit the parentheses around the second sentence, but this is
just a preference on my side; feel free to keep them if you prefer.
Okay with these changes.
Thanks,
Gerald