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[SH] PR 51340 - Enable -mfused-madd with -funsafe-math-optimizations


Hello,

The attached patch addresses PR 51340.
Tested with 

make info dvi pdf

and

make check-gcc RUNTESTFLAGS="sh.exp=pr51340* --target_board=sh-sim
\{-m4a-single/-ml,-m2/-ml,-m2a/-mb,-m2e/-ml,-m4a/-ml,-m4a-single/-ml,-m4a-single-only/-ml,-m4a-nofpu/-ml}"

OK?

Cheers,
Oleg

ChangeLog:

	PR target/51340
	* config/sh/sh.c (sh_option_override):  Set TARGET_FMAC if 	
	flag_unsafe_math_optimizations is set.
	* doc/invoke.texi (SH Options): Add -mno-fused-madd description.
	Update description of -mfused-madd.

testsuite/ChangeLog:

	PR target/51340
	* gcc/target/sh/pr51340-1.c: New.
	* gcc/target/sh/pr51340-2.c: New.
	* gcc/target/sh/pr51340-3.c: New.
Index: gcc/testsuite/gcc.target/sh/pr51340-1.c
===================================================================
--- gcc/testsuite/gcc.target/sh/pr51340-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/sh/pr51340-1.c	(revision 0)
@@ -0,0 +1,13 @@
+/* Check that the fmac insn is generated when -funsafe-math-optimizations
+   is specified.  */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1 -funsafe-math-optimizations" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } }  */
+/* { dg-final { scan-assembler "fmac" } } */
+
+float
+test_func (float a, float b, float c, float d, float e, float f)
+{
+  return a * b + c * d + e * f;
+}
+
Index: gcc/testsuite/gcc.target/sh/pr51340-2.c
===================================================================
--- gcc/testsuite/gcc.target/sh/pr51340-2.c	(revision 0)
+++ gcc/testsuite/gcc.target/sh/pr51340-2.c	(revision 0)
@@ -0,0 +1,12 @@
+/* Check that the fmac insn is not generated when -mno-fused-madd is specified.  */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1 -funsafe-math-optimizations -mno-fused-madd" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } }  */
+/* { dg-final { scan-assembler-not "fmac" } } */
+
+float
+test_func (float a, float b, float c, float d, float e, float f)
+{
+  return a * b + c * d + e * f;
+}
+
Index: gcc/testsuite/gcc.target/sh/pr51340-3.c
===================================================================
--- gcc/testsuite/gcc.target/sh/pr51340-3.c	(revision 0)
+++ gcc/testsuite/gcc.target/sh/pr51340-3.c	(revision 0)
@@ -0,0 +1,12 @@
+/* Check that the fmac insn is generated when -mfused-madd is specified.  */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1 -mfused-madd" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } }  */
+/* { dg-final { scan-assembler "fmac" } } */
+
+float
+test_func (float a, float b, float c, float d, float e, float f)
+{
+  return a * b + c * d + e * f;
+}
+
Index: gcc/config/sh/sh.c
===================================================================
--- gcc/config/sh/sh.c	(revision 187914)
+++ gcc/config/sh/sh.c	(working copy)
@@ -877,6 +877,13 @@
 	align_functions = min_align;
     }
 
+  /* Enable fmac insn for "a * b + c" SFmode calculations when -ffast-math
+     is enabled and -mno-fused-madd is not specified by the user.
+     The fmac insn can't be enabled by default due to the implied
+     FMA semantics.   See also PR target/29100.  */
+  if (global_options_set.x_TARGET_FMAC == 0 && flag_unsafe_math_optimizations)
+    TARGET_FMAC = 1;
+
   if (sh_fixed_range_str)
     sh_fix_range (sh_fixed_range_str);
 
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi	(revision 187914)
+++ gcc/doc/invoke.texi	(working copy)
@@ -885,8 +885,8 @@
 -mdivsi3_libfunc=@var{name} -mfixed-range=@var{register-range} @gol
 -mindexed-addressing -mgettrcost=@var{number} -mpt-fixed @gol
 -maccumulate-outgoing-args -minvalid-symbols -msoft-atomic @gol
--mbranch-cost=@var{num} -mcbranchdi -mcmpeqdi -mfused-madd -mpretend-cmove @gol
--menable-tas}
+-mbranch-cost=@var{num} -mcbranchdi -mcmpeqdi -mfused-madd -mno-fused-madd @gol
+-mpretend-cmove -menable-tas}
 
 @emph{Solaris 2 Options}
 @gccoptlist{-mimpure-text  -mno-impure-text @gol
@@ -18237,11 +18237,17 @@
 is in effect.
 
 @item -mfused-madd
+@itemx -mno-fused-madd
 @opindex mfused-madd
-Allow the usage of the @code{fmac} instruction (floating-point
-multiply-accumulate) if the processor type supports it.  Enabling this
-option might generate code that produces different numeric floating-point
-results compared to strict IEEE 754 arithmetic.
+@opindex mno-fused-madd
+If the processor type supports it, setting @code{-mfused-madd} will allow the
+usage of the @code{fmac} instruction (floating-point multiply-accumulate) for
+regular calculations.  Enabling this option might generate faster code but also
+produce different numeric floating-point results compared to strict IEEE 754
+arithmetic.  @code{-mfused-madd} is enabled by default by option
+@option{-funsafe-math-optimizations}.  Setting @code{-mno-fused-madd} will
+disallow the usage of the @code{fmac} instruction for regular calculations
+even if @option{-funsafe-math-optimizations} is in effect.
 
 @item -mpretend-cmove
 @opindex mpretend-cmove

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