Re: [rtl, patch] combine concat+shuffle

[Marc Glisse <marc dot glisse at inria dot fr>]

On Tue, 8 May 2012, Richard Sandiford wrote:

> I know you said that generalising it could be done later,
> and that's fine, but it looks in some ways like it would
> be easier to go straight for the more general:
>
> 	  && GET_CODE (trueop0) == VEC_CONCAT
> 	  && GET_CODE (XEXP (trueop0, 0)) == VEC_CONCAT
> 	  && GET_MODE (XEXP (trueop0, 0)) == mode
> 	  && GET_CODE (XEXP (trueop0, 1)) == VEC_CONCAT
> 	  && GET_MODE (XEXP (trueop0, 1)) == mode)
> 	{
> 	  unsigned int i0 = INTVAL (XVECEXP (trueop1, 0, 0));
> 	  unsigned int i1 = INTVAL (XVECEXP (trueop1, 0, 1));
> 	  rtx op0, op1;
>
> 	  gcc_assert (i0 < 4 && i1 < 4);
> 	  op0 = XEXP (XEXP (trueop0, i0 / 2), i0 % 2);
> 	  op1 = XEXP (XEXP (trueop0, i1 / 2), i1 % 2);
>
> 	  return simplify_gen_binary (VEC_CONCAT, mode, op0, op1);
> 	}

Yes, I hesitated.

> (completely untested).  avoid_constant_pool_reference shouldn't be
> called here.

I wasn't quite sure what it was for, but it looked safer to call it for 
nothing than to forget it ;-)

> Very minor, but this code probably belongs in the else part of the
> if (!VECTOR_MODE_P (mode)) block.

Thanks, I'll update the patch with your comments, add a testcase and 
ChangeLog and re-send it here.

--
Marc Glisse