This is the mail archive of the
mailing list for the GCC project.
Re: [PATCH] Improve andq $0xffffffff, %reg handling (PR target/53110)
On Thu, Apr 26, 2012 at 05:25:31PM +0200, Uros Bizjak wrote:
> On Wed, Apr 25, 2012 at 9:14 PM, Jakub Jelinek <email@example.com> wrote:
> > We have a splitter for reg1 = reg2 & 0xffffffff, but only if regnums
> > are different. ?But movl %edi, %edi is a cheaper variant of
> > andq $0xffffffff, %rdi even with the same register and doesn't clobber
> > flags, so this patch attempts to expand it as a zero extension early.
> > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
> > 2012-04-25 ?Jakub Jelinek ?<firstname.lastname@example.org>
> > ? ? ? ?PR target/53110
> > ? ? ? ?* config/i386/i386.md (and<mode>3): For andq $0xffffffff, reg
> > ? ? ? ?instead expand it as zero extension.
> Perhaps we can go all the way and also convert ANDs with $0xff and
> $0xffff to relevant zero_extend patterns, like in the referred
I wasn't sure about 0xffff, on which CPUs it would be a win and on which it
would not. 0xffffffff is a win always.