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Re: [Patch ARM] Fix PR51819.
- From: Ramana Radhakrishnan <ramana dot radhakrishnan at linaro dot org>
- To: Ulrich Weigand <uweigand at de dot ibm dot com>
- Cc: gcc-patches <gcc-patches at gcc dot gnu dot org>, Patch Tracking <patches at linaro dot org>
- Date: Mon, 16 Apr 2012 14:47:43 +0100
- Subject: Re: [Patch ARM] Fix PR51819.
- References: <CACUk7=UvsmX4Tm9aHZ4MA2yV-FNw6NVtnRMYk0e9MZgS=N5wJQ@mail.gmail.com> <201203311525.q2VFP7uo023366@d06av02.portsmouth.uk.ibm.com>
Hi Uli,
Apologies for the delayed response.
>
> Shouldn't the check be implemented along the following lines?
>
> ? ? ? ?if (memsize == 32 && (align % 32) == 0)
> ? ? ? ? ?align_bits = 256;
> ? ? ? ?else if ((memsize == 16 || memsize == 32) && (align % 16) == 0)
> ? ? ? ? ?align_bits = 128;
> ? ? ? ?else if (memsize >= 8 && (align % 8) == 0)
> ? ? ? ? ?align_bits = 64;
> ? ? ? ?else
> ? ? ? ? ?align_bits = 0;
This looks OK to me. Looking at the ISA documents and the variants of
the vldn instructions your summary is correct. The alignment specifier
should not be greater than the memory size being transferred and
checking this in this form is OK .
regards,
Ramana
>
> Bye,
> Ulrich
>
> --
> ?Dr. Ulrich Weigand
> ?GNU Toolchain for Linux on System z and Cell BE
> ?Ulrich.Weigand@de.ibm.com
>