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Re: [PATCH][ARM] NEON DImode neg

From: Andrew Stubbs <ams at codesourcery dot com>
To: Richard Earnshaw <rearnsha at arm dot com>
Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, "patches at linaro dot org" <patches at linaro dot org>
Date: Sat, 14 Apr 2012 13:48:57 +0100
Subject: Re: [PATCH][ARM] NEON DImode neg
References: <4F4D12C5.9070805@codesourcery.com> <4F704189.4010302@codesourcery.com> <4F86F932.60606@arm.com>

On 12/04/12 16:48, Richard Earnshaw wrote:

If negation in Neon needs a scratch register, it seems to me to be
somewhat odd that we're disparaging the ARM version.

Also, wouldn't it be sensible to support a variant that was
early-clobber on operand 0, but loaded immediate zero into that value first:

	vmov	Dd, #0
	vsub	Dd, Dd, Dm

That way you'll never need more than two registers, whereas today you
want three.

This patch implements the changes you suggested.

I've done a full bootstrap and test and found no regressions.

OK?

Andrew

P.S. This patch can't actually be committed until my "NEON DImode immediate constants" patch is approved and committed. (Without that the load #0 needs a constant pool, and loading constants this late has a bug at -O0.)

Follow-Ups:
- Re: [PATCH][ARM] NEON DImode neg
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References:
- Re: [PATCH][ARM] NEON DImode neg
  - From: Richard Earnshaw

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