This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Ping #1: [Patch,AVR] Fix/hack around spill fail ICE PR52148


2012/2/24 Georg-Johann Lay <avr@gjlay.de>:
> http://gcc.gnu.org/ml/gcc-patches/2012-02/msg00956.html
>
> Georg-Johann Lay wrote:
>> Spill failure PR52148 occurs for movmem insn that allocates 2 of AVR's 3
>> pointer registers. Register allocator is at it's limits and the patch tries to
>> cure the situation by replacing
>>
>> (match_operand:HI 0 "register_operand" "x")
>>
>> with explicit
>>
>> (reg:HI REG_X)
>>
>> and similar for Z Register classes "x" and "z" contain only one HI register.
>>
>> This PR and PR50925 show that register allocator has some problems.
>> Even though this patch is not a fix of the root cause, it allows the PR's test
>> case to compile.
>>
>> Anyways, the patch simplifies the backend and replaces an insn with 11(!)
>> operands with an insn with only 2 operands so that the patch is improvement of
>> the backend.
>>
>> The hard registers are already known at expand time so there is no need for
>> match_operands.
>>
>> Passes without regression.
>>
>> Ok for trunk?
>>
>> Johann
>>
>> Â Â Â PR target/52148
>> Â Â Â * config/avr/avr.md (movmem_<mode>): Replace match_operand that
>> Â Â Â match only one single hard register with respective hard reg rtx.
>> Â Â Â (movmemx_<mode>): Ditto.
>> Â Â Â * config/avr/avr.c (avr_emit_movmemhi): Adapt expanding to new
>> Â Â Â insn anatomy of movmem[x]_<mode>.
>> Â Â Â (avr_out_movmem): Same for printing assembler and operand usage.


Approved.

Denis.

PS: I have not understood this patch from first look


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]