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Re: Ping #1: [Patch,AVR] Fix/hack around spill fail ICE PR52148
- From: Denis Chertykov <chertykov at gmail dot com>
- To: Georg-Johann Lay <avr at gjlay dot de>
- Cc: gcc-patches at gcc dot gnu dot org, Eric Weddington <eric dot weddington at atmel dot com>
- Date: Sat, 25 Feb 2012 15:09:04 +0400
- Subject: Re: Ping #1: [Patch,AVR] Fix/hack around spill fail ICE PR52148
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2012/2/24 Georg-Johann Lay <email@example.com>:
> Georg-Johann Lay wrote:
>> Spill failure PR52148 occurs for movmem insn that allocates 2 of AVR's 3
>> pointer registers. Register allocator is at it's limits and the patch tries to
>> cure the situation by replacing
>> (match_operand:HI 0 "register_operand" "x")
>> with explicit
>> (reg:HI REG_X)
>> and similar for Z Register classes "x" and "z" contain only one HI register.
>> This PR and PR50925 show that register allocator has some problems.
>> Even though this patch is not a fix of the root cause, it allows the PR's test
>> case to compile.
>> Anyways, the patch simplifies the backend and replaces an insn with 11(!)
>> operands with an insn with only 2 operands so that the patch is improvement of
>> the backend.
>> The hard registers are already known at expand time so there is no need for
>> Passes without regression.
>> Ok for trunk?
>> Â Â Â PR target/52148
>> Â Â Â * config/avr/avr.md (movmem_<mode>): Replace match_operand that
>> Â Â Â match only one single hard register with respective hard reg rtx.
>> Â Â Â (movmemx_<mode>): Ditto.
>> Â Â Â * config/avr/avr.c (avr_emit_movmemhi): Adapt expanding to new
>> Â Â Â insn anatomy of movmem[x]_<mode>.
>> Â Â Â (avr_out_movmem): Same for printing assembler and operand usage.
PS: I have not understood this patch from first look