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Re: [PATCH][ARM] Improve 64-bit shifts (non-NEON)
- From: Richard Guenther <richard dot guenther at gmail dot com>
- To: Bernd Schmidt <bernds at codesourcery dot com>
- Cc: Steven Bosscher <stevenb dot gcc at gmail dot com>, Ramana Radhakrishnan <ramana dot radhakrishnan at linaro dot org>, Andrew Stubbs <ams at codesourcery dot com>, Richard Earnshaw <rearnsha at arm dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, "patches at linaro dot org" <patches at linaro dot org>
- Date: Wed, 8 Feb 2012 13:12:53 +0100
- Subject: Re: [PATCH][ARM] Improve 64-bit shifts (non-NEON)
- References: <4F22CBB2.firstname.lastname@example.org> <4F26B687.email@example.com> <4F27FAC0.firstname.lastname@example.org> <CACUk7=VFbmkQOTo3ZXA2FMyt14zhiAonArBghFhBrBdvBQGvHg@mail.gmail.com> <CABu31nOjG44Um43EKRad=aP-Gz91QsdU_XFHC9xi8vjcbTZnWw@mail.gmail.com> <4F32645F.email@example.com>
On Wed, Feb 8, 2012 at 1:02 PM, Bernd Schmidt <firstname.lastname@example.org> wrote:
> On 02/07/2012 11:33 PM, Steven Bosscher wrote:
>> On Tue, Feb 7, 2012 at 11:19 PM, Ramana Radhakrishnan
>> <email@example.com> wrote:
>>> Hi Andrew
>>> I find it interesting that cond_exec's in this form survive all the
>>> way till reload and "work". ?AFAIK we could never have cond_exec's
>>> before reload .
>> There is nothing wrong per-se with cond_execs before reload, as long
>> as you don't have to reload a predicate pseudo-reg.
> I thought the problem was that we'd have to emit conditional reload
> insns and inheritance wouldn't work.
It probably depends on how DF sees conditional uses / defs. If they
look like regular uses / defs then I suppose un-conditional spills/reloads
are fine - otherwise of course you'd corrupt one of the two register set
states. But that also means it's probably safe if the sequence of conditional
insns is of length 1.
Not sure we want to open that possible can of worms though ;)