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Re: [PATCH] [MIPS] fix mips_prepend insn.

diff --git a/gcc/config/mips/
b/gcc/config/mips/mips-dspr2.mdindex 5ae902f..6853b9d 100644---
a/gcc/config/mips/ b/gcc/config/mips/
-345,7 +345,7 @@? ? (set_attr "mode"	"SI")])??(define_insn
"mips_prepend"- ?[(set (match_operand:SI 0 "register_operand" "=d")+
[(set (match_operand:DI 0 "register_operand" "=d")

According to the manual, it should be DI, not SI here.

?	(unspec:SI [(match_operand:SI 1 "register_operand" "0")?		
(match_operand:SI 2 "reg_or_0_operand" "dJ")?		 ? ?(match_operand:SI 3
"const_int_operand" "n")]@@ -353,7 +353,7 @@? ?"ISA_HAS_DSPR2"?{? ?if
(INTVAL (operands[3]) & ~(unsigned HOST_WIDE_INT) 31)- ? ?operands[2]
= GEN_INT (INTVAL (operands[2]) & 31);+ ? ?operands[3] = GEN_INT
(INTVAL (operands[3]) & 31);

I think here should be operands[3] but operands[2], because it is
operate sa not rs.

? ?return "prepend\t%0,%z2,%3";?}? ?[(set_attr "type"	"arith")

On Thu, Feb 2, 2012 at 10:37 AM, Liu <> wrote:
> Hi all
> This is the bugfix patch for mips_prepend, please review.
> Jia Liu

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