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On 12/11/2011 04:50 AM, Richard Sandiford wrote: > [Mingjie, please could you help with the Loongson question near the end?] Actually, can you tell me how to test these abi combinations? I keep trying to use mips-sim or mips64-sim and get linker errors complaining of abi combinations. > Little-endian: > > The semantics of the RTL pattern are: > > { 0L, 0U } = { X[I3], X[I4 + 2] }, where X = { 1L, 1U, 2L, 2U } > > so: 0L = { 1L, 1U }[I3] (= <bop><bUL>) > 0U = { 2L, 2U }[I4] (= <aop><aUL>) > > <aop> = 2, <aUL> = I4 ? U : L > <bop> = 1, <bUL> = I3 ? U : L > > [LL] !I4 && !I3 [UL] I4 && !I3 > [LU] !I4 && I3 [UU] I4 && I3 > > Big-endian: > > The semantics of the RTL pattern are: > > { 0U, 0L } = { X[I3], X[I4 + 2] }, where X = { 1U, 1L, 2U, 2L } > > so: 0U = { 1U, 1L }[I3] (= <aop><aUL>) > 0L = { 2U, 2L }[I4] (= <bop><bUL>) > > <aop> = 1, <aUL> = I3 ? L : U > <bop> = 2, <bUL> = I4 ? L : U > > [UU] !I3 && !I4 [UL] !I3 && I4 > [LU] I3 && !I4 [LL] I3 && I4. */ > > which suggests that the PUL and PLU entries for big-endian should be > the other way around. Does that sound right, or have I misunderstood? Yes, that sounds right. > ...for little-endian, we need to pass the "U" and "L" components of the > mnemonic in the reverse order: the MIPS instruction specifies the upper > part first, whereas the rtl pattern specifies the lower part first. > And for little-endian, U refers to memory element 1 and L to memory > element 0. So I think this should be: ... Except that the actual output of the LE insn actually swaps the operands too. So I think these expanders should not *also* swap the operands. I've tidied these up a bit since then. >> +static bool >> +mips_expand_vpc_ps (struct expand_vec_perm_d *d) I've eliminated this function since then. >> + /* Convert the selector into the packed 8-bit form for pshufh. */ >> + for (i = mask = 0; i < 4; i++) >> + mask |= (d->perm[i] & 3) << (i * 2); > > I think this is endian-dependent. For little-endian, the bottom two bits > of the mask determine element 0; for big-endian, the top two bits of the > mask do. Recall that loongson can only run in little-endian. I added comments about that in the md file, but it would do no harm to add another here. > (There's a machine in the farm, but bootstrapping on it is rather slow.) Yeah, I started checking out the tree there yesterday and it never completed. > I think a lot of the endianness stuff in the patch is dependent on byte > endianness rather than word endianness. Since we only support two out > of the four combinations, it seems better not to worry which and simply > use TARGET_{BIG,LITTLE}_ENDIAN instead of {WORDS,BYTES}_{BIG,LITTLE}_ENDIAN. Sure. This is my current patch, which doesn't have the pul/plu insns swapped, as suggested above. I did change the loongson.h interface as H-P suggested. r~
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