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PATCH: Remove *mmx_maskmovq_rex
- From: "H.J. Lu" <hongjiu dot lu at intel dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: ubizjak at gmail dot com
- Date: Tue, 25 Oct 2011 14:09:44 -0700
- Subject: PATCH: Remove *mmx_maskmovq_rex
- Reply-to: "H.J. Lu" <hjl dot tools at gmail dot com>
Hi,
There is no difference bewteen *mmx_maskmovq_rex and *mmx_maskmovq_rex
execept for :SI vs :DI. This patch removes *mmx_maskmovq_rex and use
:P instead. OK for trunk if there are no regressions?
Thanks.
H.J.
---
2011-10-25 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/mmx.md (*mmx_maskmovq): Replace :SI with :P and
remove "&& !TARGET_64BIT"
(*mmx_maskmovq_rex): Removed.
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index f3b949e..37a79f8 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -1620,24 +1620,12 @@
"TARGET_SSE || TARGET_3DNOW_A")
(define_insn "*mmx_maskmovq"
- [(set (mem:V8QI (match_operand:SI 0 "register_operand" "D"))
+ [(set (mem:V8QI (match_operand:P 0 "register_operand" "D"))
(unspec:V8QI [(match_operand:V8QI 1 "register_operand" "y")
(match_operand:V8QI 2 "register_operand" "y")
(mem:V8QI (match_dup 0))]
UNSPEC_MASKMOV))]
- "(TARGET_SSE || TARGET_3DNOW_A) && !TARGET_64BIT"
- ;; @@@ check ordering of operands in intel/nonintel syntax
- "maskmovq\t{%2, %1|%1, %2}"
- [(set_attr "type" "mmxcvt")
- (set_attr "mode" "DI")])
-
-(define_insn "*mmx_maskmovq_rex"
- [(set (mem:V8QI (match_operand:DI 0 "register_operand" "D"))
- (unspec:V8QI [(match_operand:V8QI 1 "register_operand" "y")
- (match_operand:V8QI 2 "register_operand" "y")
- (mem:V8QI (match_dup 0))]
- UNSPEC_MASKMOV))]
- "(TARGET_SSE || TARGET_3DNOW_A) && TARGET_64BIT"
+ "TARGET_SSE || TARGET_3DNOW_A"
;; @@@ check ordering of operands in intel/nonintel syntax
"maskmovq\t{%2, %1|%1, %2}"
[(set_attr "type" "mmxcvt")