This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH] Minor fixups to the sparc bmask/bshuffle patterns.


From: Richard Henderson <rth@redhat.com>
Date: Mon, 03 Oct 2011 10:07:26 -0700

> On 10/03/2011 09:43 AM, David Miller wrote:
>>  (define_insn "bshuffle<V64I:mode>_vis"
>>    [(set (match_operand:V64I 0 "register_operand" "=e")
>>          (unspec:V64I [(match_operand:V64I 1 "register_operand" "e")
>> -	              (match_operand:V64I 2 "register_operand" "e")]
>> -                     UNSPEC_BSHUFFLE))
>> -   (use (reg:SI GSR_REG))]
>> +	              (match_operand:V64I 2 "register_operand" "e")
>> +		      (use (reg:SI GSR_REG))]
>> +                     UNSPEC_BSHUFFLE))]
> 
> I think I was less than clear here.  You don't need the USE either.
> The GSR register is simply a normal (third) input to the unspec.

I see, I'll fix this up, thanks Richard.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]