Re: [wwwdocs] IA-32/x86-64 Changes for upcoming 4.7.0 series

[Gerald Pfeifer <gerald at pfeifer dot com>]

On Thu, 22 Sep 2011, Kirill Yukhin wrote:
> a typo fixed.

Thanks, Kirill.  Note you were attaching the patch as 
Application/OCTET-STREAM which does not generally view nicely for
others; perhaps just include the patch in the body of the mail to
avoid that?

Index: htdocs/gcc-4.7/changes.html
===================================================================
+     <li>Implementation and automatic generation of <code>__builtin_clz*</code> 
+       using <code>lzcnt</code> instruction is available via <code>-mlzcnt</code>.</li>

...using the ... instruction....   (Add "the").

+     <li>A new <code>-mfsgsbase</code> option is available to enable GCC
+     to use new segment register read/write instructions through dedicated built-ins.</li>

Perhaps say "command-line option" instead of just option?  Though we
don't have that in the earlier cases either.

And "available that makes GCC I'm a bit use"?

How does this happen via built-ins?  From a user perspective, isn't this
just emitting the respective assember instructions?  If so, perhaps just
say "that makes GCC generate...."

+     <li>Support for new Intel <code>rdrnd</code> instruction is available via <code>-mrdrnd</code>.</li>

"the new Intel"

Fine from my perspective with these changes, though please give an
x86 maintainer time to chime in, too, before you commit.

Gerald