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Re: [Patch,AVR]: Fix PR 50358
2011/9/16 Georg-Johann Lay <avr@gjlay.de>:
> Georg-Johann Lay schrieb:
>> Denis Chertykov schrieb:
>>> 2011/9/12 Georg-Johann Lay <avr@gjlay.de>:
>>>> This patch introduces patterns for multiply-add and multiply-sub.
>>>>
>>>> On the enhanced core, these operations can be performed with the product in R0;
>>>> there is no need to MOVW it out of that register. ÂThe code is smaller and
>>>> faster and has lower register pressure.
>>>>
>>>> Tested without regressions.
>>>>
>>>> Ok to commit?
>>> Ok.
>>>
>>> Denis.
>>
>> This is the second part to fix this PR; it introduced multiply-add/-sub for
>> QImode and one insn for HI = sign_extend (QI << 1).
>>
>> With this patch PR50358 is fixed up to some corner cases.
>>
>> The insns with CONST_INT split the load of the constant after reload.
>> avr_rtx_costs describes these costs, but it would be advantageous to do the
>> split pre-reload because IRA/reload could reuse constants.
>>
>> The trouble is that reload_in_progress is false in IRA and therefore the
>> patterns match in IRA, so here is the same trouble I faced in the patch for
>> widening multiply where a function like avr_gate_split1() was regarded as to
>> hackish because it tested the pass-number to help out. ÂWithout such a function
>> in the insn condition, the insn matches in IRA and a register is re-replaced
>> with CONST_INT again, leading to crash in split2 because of gen_reg_rtx or
>> because of !reload_completed in the insn condition.
>>
>> So this patch comes without reusing constants.
>>
>> Besides that, the "Write as one pattern" changes gather two insns and write
>> them down as one; that's no functional change, it's just about using iterators
>> to reduce lines of code. ÂThe order of insns changes, but that does not matter
>> here. ÂI didn't make an extra patch for that.
>
> Split the two patches
>
> Ok to install?
>
Please, commit.
Denis.