This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH, PR43920, 1/9] ARM specific part.
On 04/01/2011 05:18 PM, Richard Earnshaw wrote:
>
> On Fri, 2011-04-01 at 16:45 +0200, Tom de Vries wrote:
>> Reposting, with ChangeLog.
>
> #define BRANCH_COST(speed_p, predictable_p) \
> - (TARGET_32BIT ? 4 : (optimize > 0 ? 2 : 0))
> + (TARGET_32BIT ? (TARGET_THUMB2 && optimize_size ? 1 : 4) \
> + : (optimize > 0 ? 2 : 0))
>
> Don't use optimize_size here, use !speed_p.
>
> Otherwise OK.
>
Replaced optimize_size by !speed_p.
Thanks,
- Tom
2011-04-01 Tom de Vries <tom@codesourcery.com>
PR target/43920
* config/arm/arm.h (BRANCH_COST): Set to 1 for Thumb-2 when optimizing
for size.
Index: gcc/config/arm/arm.h
===================================================================
--- gcc/config/arm/arm.h (revision 293961)
+++ gcc/config/arm/arm.h (revision 293962)
@@ -2201,7 +2201,8 @@ typedef struct
/* Try to generate sequences that don't involve branches, we can then use
conditional instructions */
#define BRANCH_COST(speed_p, predictable_p) \
- (TARGET_32BIT ? 4 : (optimize > 0 ? 2 : 0))
+ (TARGET_32BIT ? (TARGET_THUMB2 && !speed_p ? 1 : 4) \
+ : (optimize > 0 ? 2 : 0))
/* Position Independent Code. */
/* We decide which register to use based on the compilation options and