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Re: Tweak ARM vld3q and vld4q patterns


Tested on arm-linux-gnueabi. OK to install?

Thanks for this - yes , this is ok for trunk. It fixes PR43590 as well.

cheers
Ramana


Richard


gcc/
	* config/arm/neon.md (neon_vld3qa<mode>, neon_vld4qa<mode>): Remove
	operand 1 and reshuffle the operands to match.
	(neon_vld3<mode>, neon_vld4<mode>): Update accordingly.

Index: gcc/config/arm/neon.md
===================================================================
--- gcc/config/arm/neon.md	2011-03-24 13:47:13.000000000 +0000
+++ gcc/config/arm/neon.md	2011-03-24 15:51:59.000000000 +0000
@@ -4605,8 +4605,7 @@ (define_expand "neon_vld3<mode>"
     (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
-  emit_insn (gen_neon_vld3qa<mode>  (operands[0], operands[0],
-                                    operands[1], operands[1]));
+  emit_insn (gen_neon_vld3qa<mode>  (operands[0], operands[1], operands[1]));
    emit_insn (gen_neon_vld3qb<mode>  (operands[0], operands[0],
                                      operands[1], operands[1]));
    DONE;
@@ -4614,12 +4613,11 @@ (define_expand "neon_vld3<mode>"

  (define_insn "neon_vld3qa<mode>"
    [(set (match_operand:CI 0 "s_register_operand" "=w")
-        (unspec:CI [(mem:CI (match_operand:SI 3 "s_register_operand" "2"))
-                    (match_operand:CI 1 "s_register_operand" "0")
+        (unspec:CI [(mem:CI (match_operand:SI 2 "s_register_operand" "1"))
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD3A))
-   (set (match_operand:SI 2 "s_register_operand" "=r")
-        (plus:SI (match_dup 3)
+   (set (match_operand:SI 1 "s_register_operand" "=r")
+        (plus:SI (match_dup 2)
  		 (const_int 24)))]
    "TARGET_NEON"
  {
@@ -4628,7 +4626,7 @@ (define_insn "neon_vld3qa<mode>"
    ops[0] = gen_rtx_REG (DImode, regno);
    ops[1] = gen_rtx_REG (DImode, regno + 4);
    ops[2] = gen_rtx_REG (DImode, regno + 8);
-  ops[3] = operands[2];
+  ops[3] = operands[1];
    output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, [%3]!", ops);
    return "";
  }
@@ -4897,8 +4895,7 @@ (define_expand "neon_vld4<mode>"
     (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
    "TARGET_NEON"
  {
-  emit_insn (gen_neon_vld4qa<mode>  (operands[0], operands[0],
-                                    operands[1], operands[1]));
+  emit_insn (gen_neon_vld4qa<mode>  (operands[0], operands[1], operands[1]));
    emit_insn (gen_neon_vld4qb<mode>  (operands[0], operands[0],
                                      operands[1], operands[1]));
    DONE;
@@ -4906,12 +4903,11 @@ (define_expand "neon_vld4<mode>"

  (define_insn "neon_vld4qa<mode>"
    [(set (match_operand:XI 0 "s_register_operand" "=w")
-        (unspec:XI [(mem:XI (match_operand:SI 3 "s_register_operand" "2"))
-                    (match_operand:XI 1 "s_register_operand" "0")
+        (unspec:XI [(mem:XI (match_operand:SI 2 "s_register_operand" "1"))
                      (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
                     UNSPEC_VLD4A))
-   (set (match_operand:SI 2 "s_register_operand" "=r")
-        (plus:SI (match_dup 3)
+   (set (match_operand:SI 1 "s_register_operand" "=r")
+        (plus:SI (match_dup 2)
  		 (const_int 32)))]
    "TARGET_NEON"
  {
@@ -4921,7 +4917,7 @@ (define_insn "neon_vld4qa<mode>"
    ops[1] = gen_rtx_REG (DImode, regno + 4);
    ops[2] = gen_rtx_REG (DImode, regno + 8);
    ops[3] = gen_rtx_REG (DImode, regno + 12);
-  ops[4] = operands[2];
+  ops[4] = operands[1];
    output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, [%4]!", ops);
    return "";
  }

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