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tiny i386 prefetching code cleanup
- From: Jan Hubicka <hubicka at ucw dot cz>
- To: gcc-patches at gcc dot gnu dot org
- Date: Sat, 22 Jan 2011 18:04:47 +0100
- Subject: tiny i386 prefetching code cleanup
Hi,
prefetching is enabled based on software_prefetching_beneficial_p predicate.
Other target specific bits are listed in initial_ix86_tune_features tables,
and this one should be too.
Unless I will be told it is OK, I will hold the patch for stage1.
Bootstrapped/regtested x86_64-linux.
Honza
* i386.h (ix86_tune_indices): Add X86_TUNE_SOFTWARE_PREFETCHING_BENEFICIAL.
(TARGET_SOFTWARE_PREFETCHING_BENEFICIAL): New macro.
* i386.c (initial_ix86_tune_features): Add X86_SOFTARE_PREFETCHING_BENEFICIAL:.
(software_prefetching_beneficial_p): Remove.
(ix86_option_override_internal): Use TARGET_SOFTWARE_PREFETCHING_BENEFICIAL
instead of software_prefetching_beneficial_p.
Index: config/i386/i386.h
===================================================================
--- config/i386/i386.h (revision 168831)
+++ config/i386/i386.h (working copy)
@@ -322,6 +322,7 @@ enum ix86_tune_indices {
X86_TUNE_FUSE_CMP_AND_BRANCH,
X86_TUNE_OPT_AGU,
X86_TUNE_VECTORIZE_DOUBLE,
+ X86_TUNE_SOFTWARE_PREFETCHING_BENEFICIAL,
X86_TUNE_LAST
};
@@ -418,6 +419,8 @@ extern unsigned char ix86_tune_features[
#define TARGET_OPT_AGU ix86_tune_features[X86_TUNE_OPT_AGU]
#define TARGET_VECTORIZE_DOUBLE \
ix86_tune_features[X86_TUNE_VECTORIZE_DOUBLE]
+#define TARGET_SOFTWARE_PREFETCHING_BENEFICIAL \
+ ix86_tune_features[X86_TUNE_SOFTWARE_PREFETCHING_BENEFICIAL]
/* Feature tests against the various architecture variations. */
enum ix86_arch_indices {
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c (revision 168831)
+++ config/i386/i386.c (working copy)
@@ -1977,6 +1977,11 @@ static unsigned int initial_ix86_tune_fe
/* X86_TUNE_VECTORIZE_DOUBLE: Enable double precision vector
instructions. */
~m_ATOM,
+
+ /* X86_SOFTARE_PREFETCHING_BENEFICIAL: Enable software prefetching
+ at -O3. For the moment, the prefetching seems badly tuned for Intel
+ chips. */
+ m_K6_GEODE | m_AMD_MULTIPLE
};
/* Feature tests against the various architecture variations. */
@@ -3147,27 +3152,6 @@ ix86_target_string (int isa, int flags,
return ret;
}
-/* Return TRUE if software prefetching is beneficial for the
- given CPU. */
-
-static bool
-software_prefetching_beneficial_p (void)
-{
- switch (ix86_tune)
- {
- case PROCESSOR_GEODE:
- case PROCESSOR_K6:
- case PROCESSOR_ATHLON:
- case PROCESSOR_K8:
- case PROCESSOR_AMDFAM10:
- case PROCESSOR_BTVER1:
- return true;
-
- default:
- return false;
- }
-}
-
/* Return true, if profiling code should be emitted before
prologue. Otherwise it returns false.
Note: For x86 with "hotfix" it is sorried. */
@@ -4095,7 +4079,7 @@ ix86_option_override_internal (bool main
if (flag_prefetch_loop_arrays < 0
&& HAVE_prefetch
&& optimize >= 3
- && software_prefetching_beneficial_p ())
+ && TARGET_SOFTWARE_PREFETCHING_BENEFICIAL)
flag_prefetch_loop_arrays = 1;
/* If using typedef char *va_list, signal that __builtin_va_start (&ap, 0)