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PATCH: Check 256bit AVX register in move expanders
- From: "H.J. Lu" <hongjiu dot lu at intel dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Uros Bizjak <ubizjak at gmail dot com>
- Date: Fri, 5 Nov 2010 05:22:54 -0700
- Subject: PATCH: Check 256bit AVX register in move expanders
- Reply-to: "H.J. Lu" <hjl dot tools at gmail dot com>
Hi,
This patch checks 256bit AVX register in move expanders. OK for
trunk?
Thanks.
H.J.
--
gcc/
2010-11-05 H.J. Lu <hongjiu.lu@intel.com>
Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.c (ix86_expand_move): Set use_avx256_p if
256bit AVX register is used.
(ix86_expand_vector_move_misalign): Likewise.
(ix86_expand_vector_move): Replace use_avx256_p with
VALID_AVX256_REG_MODE.
gcc/testsuite/
2010-11-05 H.J. Lu <hongjiu.lu@intel.com>
* gcc.target/i386/avx-vzeroupper-19.c: New.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 3558899..00febba 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -15000,6 +15000,9 @@ ix86_expand_move (enum machine_mode mode, rtx operands[])
rtx op0, op1;
enum tls_model model;
+ if (VALID_AVX256_REG_MODE (mode))
+ cfun->machine->use_avx256_p = true;
+
op0 = operands[0];
op1 = operands[1];
@@ -15144,7 +15147,7 @@ ix86_expand_vector_move (enum machine_mode mode, rtx operands[])
rtx op0 = operands[0], op1 = operands[1];
unsigned int align = GET_MODE_ALIGNMENT (mode);
- if (use_avx256_p (mode, NULL_TREE))
+ if (VALID_AVX256_REG_MODE (mode))
cfun->machine->use_avx256_p = true;
/* Force constants other than zero into memory. We do not know how
@@ -15253,6 +15256,9 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
{
rtx op0, op1, m;
+ if (VALID_AVX256_REG_MODE (mode))
+ cfun->machine->use_avx256_p = true;
+
op0 = operands[0];
op1 = operands[1];
diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-19.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-19.c
new file mode 100644
index 0000000..602de87
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-19.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mavx -mtune=generic -dp" } */
+
+void feat_s3_cep_dcep (int cepsize_used, float **mfc, float **feat)
+{
+ float *f;
+ float *w, *_w;
+ int i;
+ __builtin_memcpy (feat[0], mfc[0], cepsize_used * sizeof(float));
+ f = feat[0] + cepsize_used;
+ w = mfc[2];
+ _w = mfc[-2];
+ for (i = 0; i < cepsize_used; i++)
+ f[i] = w[i] - _w[i];
+}
+
+/* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */