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Re: Combine four insns
Hi,
On Tue, 10 Aug 2010, Bernd Schmidt wrote:
> if (i0)
> {
> int i;
> int ncst = 0;
> int nshift = 0;
> for (i = 0; i < 3; i++)
> {
> rtx insn = i == 0 ? i0 : i == 1 ? i1 : i2;
> rtx set = single_set (insn);
>
> if (set && CONSTANT_P (SET_SRC (set)))
> ncst++;
> else if (set && (GET_CODE (SET_SRC (set)) == ASHIFT
> || GET_CODE (SET_SRC (set)) == ASHIFTRT
> || GET_CODE (SET_SRC (set)) == LSHIFTRT))
> nshift++;
> }
> if (ncst == 0 && nshift < 2)
> return 0;
> }
What follows will degenerate into a 'try this, try that, try something
else' discussion, but ... well :) What I had in mind was rather to test
if at least two of the insns have a constant in its leafs. Ala:
src = SET_SRC (set);
if (BINARY_P (src)
&& (CONSTANT_P (XEXP (src, 0)) || CONSTANT_P (XEXP (src, 1))))
ncstleaf++;
And then only do something if ncstleaf >= 2, or possibly in combination
with the above heuristics. The idea being that if those constant leafs
are operands of arithmetic chains then they most probably can be combined
somehow.
> With the heuristic, we still catch the majority of interesting cases on
> Thumb-1, with a reduced number of attempts, but we also miss some
> optimizations like these:
>
> - add r2, r2, #1
> lsl r2, r2, #5
> - add r3, r3, r2
> - sub r3, r3, #32
> + add r3, r2, r3
I believe this case should then be included, it actually has three
constant leafs in four instructions.
> ====
> - mvn r3, r3
> lsr r3, r3, #16
> - mvn r3, r3
> ====
Hmm, aren't these originally three RTL insns? Why does the four-combine
heuristic affect this sequence?
Ciao,
Michael.