This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[ARM] Disable cstoredf4 for single precision VFP


When working on Cortex-M4, I got an ICE from GCC. This patch should fix it. Testing on Cortex-M4 board with "-mcpu=cortex-m4 -mfloat-abi=softfp -mfpu=fpv4-sp-d16" shows this patch fixes many FAILs.

Is it OK?


Regards, -- Jie Zhang CodeSourcery
	* config/arm/arm.md (cstoredf4): Only valid when
	!TARGET_VFP_SINGLE.

Index: config/arm/arm.md
===================================================================
--- config/arm/arm.md	(revision 163048)
+++ config/arm/arm.md	(working copy)
@@ -7417,7 +7417,7 @@
 	(match_operator:SI 1 "arm_comparison_operator"
 	 [(match_operand:DF 2 "s_register_operand" "")
 	  (match_operand:DF 3 "arm_float_compare_operand" "")]))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
   "emit_insn (gen_cstore_cc (operands[0], operands[1],
 			     operands[2], operands[3])); DONE;"
 )

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]