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Re: ARM patch: New cbranchqi, cbranchhi patterns for Thumb-1
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Bernd Schmidt <bernds at codesourcery dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Thu, 15 Jul 2010 15:43:34 +0100
- Subject: Re: ARM patch: New cbranchqi, cbranchhi patterns for Thumb-1
- References: <4C3F0C1F.email@example.com>
On Thu, 2010-07-15 at 15:24 +0200, Bernd Schmidt wrote:
> On Thumb-1, comparisons of integer values smaller than a word can be
> done by shifting the value to the left. This patch adds a new macroized
> pattern, cbranch<mode>4_insn, which is used for QImode and HImode, and
> does exactly that. Effects:
> - lsl r2, r1, #24
> - lsr r2, r2, #24
> - cmp r2, #0
> + lsl r1, #24
> bne .L195
> This uses the neat trick of putting a matching constraint on a
> An earlier version (with slightly more stupid code) was regression
> tested on qemu/arm-linux with my usual set of three flags. This version
> generates identical code as the tested one for all my testcases. Ok if
> retest passes?
This is going to only set the N and Z flags correctly. V and C will
have different values. Having looked at arm_select_cc_mode I can't
quite convince myself that it will be safe for inequality comparisons.
The only relevent test in that that I can see is
if (GET_MODE (x) == QImode && (op == EQ || op == NE))
Which handles your example, but none of the others.
Also note, the same trick should be usable on ARM and Thumb2 if we don't
do that already.