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Re: ARM patch: Add a Thumb-1 ldrsb peephole
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Bernd Schmidt <bernds at codesourcery dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Fri, 09 Jul 2010 11:24:34 +0100
- Subject: Re: ARM patch: Add a Thumb-1 ldrsb peephole
- References: <4C36F592.6040901@codesourcery.com>
On Fri, 2010-07-09 at 12:10 +0200, Bernd Schmidt wrote:
> Here's a small by-product of my attempts to tune Thumb-1 code.
>
> - add r3, r3, #124
> - mov r7, #0
> + mov r7, #124
> ldrsb r7, [r3, r7]
>
> Tested in the same run as mentioned in
> http://gcc.gnu.org/ml/gcc-patches/2010-07/msg00756.html
>
> Ok?
>
This is OK.
Hmm, makes me think. Could we also have a peephole to optimize the
thumb-2 case?
add r3, r3, r4
ldrsb r7, [r3, #124] // 32-bit, r3 dead
into
add r3, r3, #124
ldrsb r7, [r3, r4] // 16-bit