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Ping: ARM ldm/stm peepholes
- From: Bernd Schmidt <bernds at codesourcery dot com>
- To: Richard Earnshaw <rearnsha at arm dot com>
- Cc: ramana dot radhakrishnan at arm dot com, GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 28 Jun 2010 13:09:00 +0200
- Subject: Ping: ARM ldm/stm peepholes
- References: <4BCD9301.2060605@codesourcery.com> <1272010406.6783.72.camel@e200593-lin.cambridge.arm.com> <1272027779.1977.22.camel@e200601-lin.cambridge.arm.com> <4C0E6863.6010702@codesourcery.com>
On 06/08/2010 05:57 PM, Bernd Schmidt wrote:
> With "official" performance numbers apparently unavailable, Ramana asked
> me to run some benchmarks, with a focus on when to enable generation of
> ldm insns on Cortex-A9 (the assumption being that on other cores, ldm
> should always be a win, and so should stm everywhere).
>
> I've tested three variants of the patch against SPEC2k on an A9 board -
> first the full patch, then a variant which restrict generation of ldm
> insns to sequences of 3 or more, and one variant which only allows ldm
> for 4 insn sequences.
>
> Both the full patch and the 3/4-only variant are quite close to an
> unpatched compiler. The 3/4-only variant is 3.5% better on 164.gzip vs.
> the full patch, which translates into a 0.3% improvement in overall
> score. The 4-only variant is significantly worse, with large drops in
> 164.gzip and 253.perlbmk, for an overall 1% lower score.
>
> Given these results, what would you like me to do with the patch? Leave
> it as-is? Modify it to disallow 2-insn ldms on Cortex-A9? Something else?
Ping.
Bernd