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Re: [PATCH, ARM] Low interrupt latency support (avoiding ldm/stm)
Julian Brown wrote:
> I'm not entirely sure still whether applying this patch is a good idea
> though. There's a lot of potential for bit-rot to creep in (i.e.
> introduction of ldm/stm or fldm/fstm instructions without checking the
> use_load_store_multiple flag). OTOH I believe ARM's own compiler has
> supported a similar option since prehistoric times, so maybe there's
> demand.
I think this should go in.
(For avoidance of doubt, I have no commercial motivation for this
statement. The customer that funded the work is not pressing for its
contribution, and there's no big cost to CodeSourcery either in
maintaining it locally or dropping it from our sourcebase.)
My feeling is that the ARM architecture, as opposed to specific ARM
cores, doesn't mandate performance characteristics of instructions, and
we know that for some extant ARM architecture CPUs, using ldm/stm has
impact on latency, so this is a useful option.
This email shouldn't be construed as an approval. I'm not going to try
take away what should be the prerogatives of the ARM maintainers. Just
making the case that this is beneficial.
--
Mark Mitchell
CodeSourcery
mark@codesourcery.com
(650) 331-3385 x713