Re: ARM patch: Thumb2 reorg

[Richard Earnshaw <rearnsha at arm dot com>]

On Wed, 2010-04-28 at 11:35 +0200, Bernd Schmidt wrote:
> This introduces a Thumb2-specific reorg pass.  While working on the IRA
> patch I posted yesterday, I noticed that ifcvt was affected by register
> allocation.  We have a peephole2 that converts arithmetic instructions
> into their flag-clobbering versions, since those have smaller encodings.
>  This happens a bit too early in the pipeline and can prevent further
> optimizations.
> 
> Fixed by moving it to the reorg pass.  Here's a sample of changes:
> 
> .L7:                            .L7:
>         ldrh    r1, [r2, r3]            ldrh    r1, [r2, r3]
>         cmp     r1, r0                  cmp     r1, r0
>         bne     .L6           |         itt     eq
>         adds    r1, r5, r3    |         addeq   r1, r5, r3
>         ldr     r4, [r1, #4]  |         ldreq   r4, [r1, #4]
> .L6:                          <
> 
> or
> 
>         mov     r2, r1        |         and     r2, r1, r4
>         mov     r3, r6        |         and     r3, r6, r5
>         ands    r2, r2, r4    <
>         ands    r3, r3, r5    <
> 
> 
> This patch has been regression tested on
> arm-linux-gnueabi(qemu-system-armv7{arch=armv7-a/thumb,thumb,}); I've
> also run SPEC2000 on Cortex-A9, where this patch together with the IRA
> patch improves overall score a tiny bit, with a ~2.5% improvement on
> gap.  Ok?
> 
> There are other things we could add to thumb2_reorg; e.g. creation of IT
> insns - currently we seem to overestimate the size of all cond_execs on
> Thumb2.
> 
> 
> Bernd

Hmm, neat.

However, we need to take the costs/benefits into account.  If the branch
is likely to be highly predictably taken, then this change may not be
beneficial (particularly on Coretex-A9).

A bit like combine, this patch should compare the costs of the
transformed code with the costs of the existing code and only do the
transformation if the results look better.

R.