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RE: [PATCH, MIPS] 74k tuning for divide traps


On Tue, 2010-04-13 at 15:58 -0700, Fu, Chao-Ying wrote:
>         * config/mips/mips.c (mips_output_division): When
>         GENERATE_DIVIDE_TRAPS, generate the trap instructions against
> zero
>         before the actual divide.  This is friendlier to out-of-order
> cpus
>         like the 74k.

This doesn't indicate why the patch helps though.  If this is for an
out-of-order CPU, then why does it matter what the order of the
instructions is?  It occurred to me that this might have something do
with support for precise exceptions, but I don't see what the exact
problem is.  Probably we have to drain the pipe if the trap insn takes
an exception, but that means we are optimizing for the rare case in
which we are dividing by zero which seems wrong.  If we don't take an
exception, then I don't see why putting the trap before the divide
helps.  Since the divide is a long latency insn, it seems we want to
fetch it as early as possible, so that it can be issued as early as
possible, which means it should come first just in case the two
instructions end up in different fetch packets.  But there is a good
chance that there is something I have missed, since I don't have
detailed pipeline info.  I only have the info that is in the manuals
which gives a general pipeline description.

Jim



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