Re: PATCH: Add XOP 128-bit and 256-bit support for upcoming AMD Orochi processor.

[Uros Bizjak <ubizjak at gmail dot com>]

On 11/19/2009 04:51 PM, Sebastian Pop wrote:

> > Why "!reg_mentioned_p"? Don't you trust reload? The documentation for "%"
> > operand modifier claims: "... Therefore, this operand may not lie in a
> > register that is used as an input operand or as part of any memory address."
> >
> > You can probably remove all reg_mentioned_p calls through the patch.
> >      
> As I inherited of all these left over changes, I am testing on amd64-linux the
> attached patch to fix this issue.  Ok for trunk if this passes regstrap?
>    

Yes, this change is pre-approved for mainline.

> > I think that the best way is to submit another revision of the patch to
> > merge operand alternatives and fix reg_mentioned_p issues.
> >
> > Another outstanding issue is:
> >
> > "xop_pmacsdql" insn and "*xop_pmacsdql_mem" (and similar ones) that differ
> > only in operand 3 predicate. I think that these two patterns should be
> > merged into one with a post-reload splitter that will handle faked memory
> > operand.
> >      
> Was this already fixed, or is this still a problem?
>    

It is not a problem, but rather a suggestion for an improvement. Please 
note i.e. "xop_pmacsdql" and "*xop_pmacdql_mem" where the later uses 
fake memory to (IIRC) satisfy combine in order to generate pmac when 
arrays are used. Later, we split this invalid insn to the one that uses 
register as operand 3.

However, the same can be achieved by changing operand 3  in 
"xop_pmacsdql" to:

     (match_operand:V2DI 3 "nonimmediate_operand" "x,x")))]

Note, that combine will see a nonimmediate_operand, where memory operand 
will be later fixed in a reload pass. Reload will automatically move 
memory operand to SSE register to satisfy operand3 constraint.

However, mentioned instructions differ in 5th argument in the call to 
ix86_fma4_valid_op_p insn predicate function. Probably we can depend 
this argument on reload_completed, since we don't allow memory operands 
when registers are allocated.

Uros.