Re: RFA: Add support for Renesas RX architectiure to GCC

[Nick Clifton <nickc at redhat dot com>]

Hi Richard,

  Thanks for the continued review.

  Here are some more answers to your questions.

> >   /* Never tailcall something for which we have no decl.  */
> >   if (decl == NULL)
> >     return false;
>
> Why?  It would appear that at least r5 and r14 are free.

I was not sure that this situation would ever arise, but my thought was 
that if we did not have a decl we could not check to make sure that the 
function does not have any of the interrupt/exception/naked attributes.

> >           fixed_regs[15] = call_used_regs[15] = 1;
>
> Um, this is your struct_value_regnum.  How can this possibly work?

No interrupt handler will ever return any value, let alone a structure, 
so there is no need for a struct_value_regnum.


> >   /* If needed, set up the frame pointer.  */
> >   if (frame_pointer_needed)
> >     {
> >       if (frame_size)
> >         insn = emit_insn (gen_addsi3 (frame_pointer_rtx, 
> > stack_pointer_rtx,
> >                                       GEN_INT (- (HOST_WIDE_INT) 
> > frame_size)));
> >       else
> >         insn = emit_move_insn (frame_pointer_rtx, stack_pointer_rtx);
> ...
> >   else if (frame_size)
> >     {
> >       if (frame_pointer_needed)
> >         insn = emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
>
> Surely this second hunk isn't needed?

Probably not.  I was just being paranoid.

> >      In big-endian-data-mode however instructions are read into the CPU
> >      4 bytes at a time.  These bytes are then swapped around before being
> >      passed to the decoder.  So...we must partition our trampoline into
> >      4 byte packets and swap these packets around so that the instruction
> >      reader will reverse the process.  But, in order to avoid splitting
> >      the 32-bit constants across these packet boundaries, (making 
> > inserting
> >      them into the constructed trampoline very difficult) we have to 
> > pad the
> >      instruction sequence with NOP insns.  ie:
> >
> >            nop
> >            nop
> >            mov.l        #<...>, r8
> >            nop
> >            nop
> >            mov.l        #<...>, r9
> >            jmp          r9
> >            nop
> >            nop             */
>
> Wouldn't it be simpler to
>
> >    2 0000 FD 6A 19                        mvfc    pc, r9
> >    3 0003 ED 98 03                        mov.l    12[r9], r8
> >    4 0006 ED 99 04                        mov.l    16[r9], r9
> >    5 0009 7F 09                           jmp    r9
> >    6 000b 03                              nop
> >    7 000c EF BE AD DE                     .long    0xdeadbeef
> >    8 0010 EF BE AD DE                     .long    0xdeadbeef
>
> Certainly this is 4 bytes smaller than your sequence above.

Err, no it's not.  My sequence is 20 bytes long, just the same as yours.

   0:   03                              nop
   1:   03                              nop
   2:   fb 82 ef be ad de               mov.l   #0xdeadbeef, r8
   8:   03                              nop
   9:   03                              nop
   a:   fb 92 ef be ad de               mov.l   #0xdeadbeef, r9
  10:   7f 09                           jmp     r9
  12:   03                              nop
  13:   03                              nop


> > rx_trampoline_init (rtx tramp, tree fndecl, rtx chain)

This whole bit of code was completely bogus.  It was a fast and dirty 
attempt at updating the port from the old method of emitting trampolines 
and I did not get it right.  The revised submission (to follow soon) has 
this code fixed.

Cheers
  Nick