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Re: [PATCH 1/4, MIPS] Add r2 variant for *clear_upper32
Richard Sandiford writes:
> OK with that change, thanks.
Thanks. For the record, this is what I've checked in.
Adam
Index: ChangeLog
===================================================================
--- ChangeLog (revision 150315)
+++ ChangeLog (working copy)
@@ -1,3 +1,7 @@
+2009-07-31 Adam Nemet <anemet@caviumnetworks.com>
+
+ * config/mips/mips.md (*clear_upper32_dext): New pattern.
+
2009-07-31 Uros Bizjak <ubizjak@gmail.com>
* config/i386/bsd.h (ASM_BYTE): New define.
Index: testsuite/ChangeLog
===================================================================
--- testsuite/ChangeLog (revision 150315)
+++ testsuite/ChangeLog (working copy)
@@ -1,3 +1,7 @@
+2009-07-31 Adam Nemet <anemet@caviumnetworks.com>
+
+ * gcc.target/mips/ext-4.c: New test.
+
2009-07-30 Sebastian Pop <sebastian.pop@amd.com>
* g++.dg/tree-ssa/pr33615.C: Fix pattern for lim.
Index: config/mips/mips.md
===================================================================
--- config/mips/mips.md (revision 149829)
+++ config/mips/mips.md (working copy)
@@ -2785,7 +2785,7 @@ (define_insn_and_split "*clear_upper32"
[(set (match_operand:DI 0 "register_operand" "=d,d")
(and:DI (match_operand:DI 1 "nonimmediate_operand" "d,W")
(const_int 4294967295)))]
- "TARGET_64BIT"
+ "TARGET_64BIT && !ISA_HAS_EXT_INS"
{
if (which_alternative == 0)
return "#";
@@ -2802,6 +2802,21 @@ (define_insn_and_split "*clear_upper32"
[(set_attr "move_type" "shift_shift,load")
(set_attr "mode" "DI")])
+(define_insn "*clear_upper32_dext"
+ [(set (match_operand:DI 0 "register_operand" "=d,d")
+ (and:DI (match_operand:DI 1 "nonimmediate_operand" "d,W")
+ (const_int 4294967295)))]
+ "TARGET_64BIT && ISA_HAS_EXT_INS"
+{
+ if (which_alternative == 0)
+ return "dext\t%0,%1,0,32";
+
+ operands[1] = gen_lowpart (SImode, operands[1]);
+ return "lwu\t%0,%1";
+}
+ [(set_attr "move_type" "arith,load")
+ (set_attr "mode" "DI")])
+
(define_expand "zero_extend<SHORT:mode><GPR:mode>2"
[(set (match_operand:GPR 0 "register_operand")
(zero_extend:GPR (match_operand:SHORT 1 "nonimmediate_operand")))]
Index: testsuite/gcc.target/mips/ext-4.c
===================================================================
--- testsuite/gcc.target/mips/ext-4.c (revision 0)
+++ testsuite/gcc.target/mips/ext-4.c (revision 0)
@@ -0,0 +1,11 @@
+/* For MIPS64r2 use DEXT rather than DSLL/DSRL for clear_upper32. */
+/* { dg-do compile } */
+/* { dg-options "-O isa_rev>=2 -mgp64" } */
+/* { dg-final { scan-assembler "\tdext\t" } } */
+/* { dg-final { scan-assembler-not "sll" } } */
+
+unsigned long long
+f (unsigned long long i)
+{
+ return i & 0xffffffffull;
+}