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Re: [PATCH][ARM] Add a missing fix in a previous patch for ICE 64-bit moves (rev 147612)
- From: Mikael Pettersson <mikpe at it dot uu dot se>
- To: =?big5?b?RG91ZyBLd2FuICjD9q62vHcp?= <dougkwan at google dot com>
- Cc: gcc-patches <gcc-patches at gcc dot gnu dot org>, Richard Earnshaw <rearnsha at arm dot com>
- Date: Fri, 24 Jul 2009 23:32:32 +0200
- Subject: Re: [PATCH][ARM] Add a missing fix in a previous patch for ICE 64-bit moves (rev 147612)
- References: <498552560907211222g3d6595abh1cae4ad2e7bd44a4@mail.gmail.com>
=?Big5?B?RG91ZyBLd2FuICjD9q62vHcp?= writes:
> Hi,
>
> This is a follow up of the following patch:
>
> http://gcc.gnu.org/ml/gcc-patches/2009-05/msg00994.html
>
> which fixes an ICE bug in adddi3. A similar problem exists in subdi3
> but Richard's original patch does not fix that. The patch below
> addresses the remaining issue. it has been tested on
> arm-unknown-linux-gnueabi with no new regressions.
By visual inspection of the code there appears to be a similar problem
in negdi2, see the patch below. Unfortunately my attempts to construct
a test case triggering that pattern failed.
/Mikael
--- gcc-4.5-20090723/gcc/config/arm/arm.md.~1~ 2009-07-23 17:02:20.000000000 +0200
+++ gcc-4.5-20090723/gcc/config/arm/arm.md 2009-07-24 23:17:40.000000000 +0200
@@ -3507,7 +3507,7 @@ (define_expand "negdi2"
if (TARGET_THUMB1)
{
if (GET_CODE (operands[1]) != REG)
- operands[1] = force_reg (SImode, operands[1]);
+ operands[1] = force_reg (DImode, operands[1]);
}
"
)