This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH] Use RTX_AUTOINC in rs6000 predicates.md
- From: Richard Sandiford <rdsandiford at googlemail dot com>
- To: David Edelsohn <dje dot gcc at gmail dot com>
- Cc: gcc-patches <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 14 Jul 2009 14:47:58 +0100
- Subject: Re: [PATCH] Use RTX_AUTOINC in rs6000 predicates.md
- References: <303e1d290907140611n7c3461c6u6539756086803837@mail.gmail.com>
> During the discussions about the rs6000 non-autoinc constraint
> question, Richard Henderson mentioned the ia64 constraint. ?The rs6000
> predicate should be simplified similarly. ?Is this reasonable?
Looks good to me FWIW.
Like you said in your reply in the autoinc thread, this predicate could
be used with a new ia64-like constraint that asm writers can use. OTOH,
it might make sense for the new constraint to use the same condition as
the ia64 one, thus skipping the memory_operand check. We know that
reload will make every MEM legitimate, so for exclusive checks like this,
'(match_test "mem")' seems better than '(match_operand "memory_operand")'.
(I was just about to start on a patch for that.)
I think this is probably just telling you back what you already said,
but the predicate's current name seems misleading; it accepts reg+reg
addresses whereas "o" doesn't. So as things stand, the FP conversion
patterns could in principle accept a non-offsettable memref that needs
to be reloaded into an offsettable one. (And the insns really do need
offsettable addresses.)
So I was wondering about adding the new constraint with:
(and (match_code "mem")
(match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
and rewriting offsettable_mem_operand to use offsettable_memref_p.
OTOH, I could be talking rubbish. ;)
Richard