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[PATCH, ARM] Allow TImode values in ARM core registers
- From: Julian Brown <julian at codesourcery dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: ramana dot radhakrishnan at arm dot com
- Date: Wed, 3 Jun 2009 16:58:31 +0100
- Subject: [PATCH, ARM] Allow TImode values in ARM core registers
This patch was approved here but never applied:
The patch is still needed on mainline today, so I intend to apply the
Re-tested with no regressions (cross to ARM Linux).
* config/arm/arm.c (arm_hard_regno_mode_ok): Permit values of four
words or less (including TImode) in core registers.
--- gcc/config/arm/arm.c (revision 148084)
+++ gcc/config/arm/arm.c (working copy)
@@ -14741,13 +14741,13 @@ arm_hard_regno_mode_ok (unsigned int reg
return VALID_IWMMXT_REG_MODE (mode);
- /* We allow any value to be stored in the general registers.
+ /* We allow almost any value to be stored in the general registers.
Restrict doubleword quantities to even register pairs so that we can
- use ldrd. Do not allow Neon structure opaque modes in general registers;
- they would use too many. */
+ use ldrd. Do not allow very large Neon structure opaque modes in
+ general registers; they would use too many. */
if (regno <= LAST_ARM_REGNUM)
return !(TARGET_LDRD && GET_MODE_SIZE (mode) > 4 && (regno & 1) != 0)
- && !VALID_NEON_STRUCT_MODE (mode);
+ && ARM_NUM_REGS (mode) <= 4;
if (regno == FRAME_POINTER_REGNUM
|| regno == ARG_POINTER_REGNUM)