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Re: [Patch ARM] Improve Thumb2 code generation.
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Ramana Radhakrishnan <ramana dot radhakrishnan at arm dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Tue, 19 May 2009 11:27:02 +0100
- Subject: Re: [Patch ARM] Improve Thumb2 code generation.
- References: <001001c9d869$e674f4c0$b35ede40$@firstname.lastname@example.org>
On Tue, 2009-05-19 at 11:09 +0100, Ramana Radhakrishnan wrote:
> The Thumb2 backend currently
> * Doesn't support generation of bics with shift operators.
> * Doesn't support the generation of the orn instruction.
> I'm currently testing this patch that fixes these for an arm-none-eabi cross
> target on a qemu target with code generation enabled by default for a
> cortex-a8 core. Ok to commit if no regressions ?
> 2009-05-19 Ramana Radhakrishnan <email@example.com>
> * config/arm/arm.md (*arm_iorsi3): Refactored for only ARM.
> (peephole ior (reg, int) -> mov, ior): Refactored for only ARM.
> * config/arm/thumb2.md (*thumb_andsi_not_shiftsi_si): Allow bic
> with shifts for Thumb2.
> (orsi_notsi): New for orn.
> (*thumb_orsi_notshiftsi_si): Allow orn with shifts.
> (*thumb2_iorsi3): Rewrite support for iorsi for Thumb2.
> * config/arm/arm.c (const_ok_for_op): Split case for IOR for Thumb2.
> (arm_gen_constant): Set can_invert for IOR and Thumb2, Add comments.
> Don't invert remainder for IOR.