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[power7-meissner, ibm-gcc-4_3-branch] Power7 tweaks


These tweaks are to prevent some of the bad code that is being generated when
the compiler wants to use the branch and decrement instructions in code that
has a switch statement.

The indirect jump and switch table insns prefer to only use the CTR register
and not the LR register, presumably so we don't have to save the LR in a leaf
function.

The doloop_end insn really would prefer to use the CTR register, but grudingly
will allow use of other registers, memmory, or the LR/CTR registers.

The 4.5 compiler in a moment of brilliance (not), decides to use the LR
register to spill the count to, and has to do a move from LR, decrement,
move back to LR, and test, while the 4.3 compiler with the recent power
backend, decides to move the index to a floating point register, and then bails
out when there is no reload problem.

It would be nice if we had some way of determining that for the loop in
question, whether there were any indirect jumps, switches, or calls, so that we
knew we could use the CTR register, but still allow other regions of the code
to use the count register.  Without that, I have restricted the code not to
generate the countdown loops if the function used a switch statement or
indirect jump.  The libcpp/exec.c module shows this up.

I also changed the secondary reload to allow pseudos in address checking, since
at secondary reload time, all of the pseudos are not yet nailed down.

Finally, I fixed some thinkos in power7 costs, and added more debug output for
-mdebug=cost.

-- 
Michael Meissner, IBM
4 Technology Place Drive, MS 2203A, Westford, MA, 01886, USA
meissner@linux.vnet.ibm.com

Attachment: gcc-power7.patch34
Description: Text document

Attachment: gcc-power7-ibm43.patch04
Description: Text document


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