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Re: A new gimple pass (LRS: live range shrinking) to reduce register pressure


On Mon, Dec 29, 2008 at 10:05 PM, Andrew Pinski <pinskia@gmail.com> wrote:
>
> Hi,
>  I noticed that you walk the trees in normalize_gimple_stmt to get
> the uses, but that information is already provided by using
> FOR_EACH_SSA_USE_OPERAND, this information is kept up todate too and
> it works on both PHIs and normal statements.  The defines information
> is also provided by FOR_EACH_SSA_DEF_OPERAND.  Also some statements
> might have more than one definition (I am thinking of asms).

Good point. I actually need to collect the pointers of the ssa names
(i.e., operand slots -- the uses are referred to as use references) --
this should also be available from use_operand_p.


>
> What happens if there is only one register class, like on the SPU.

The register pressure will be underestimated.

>
> get_nm_reg_class is going to return wrong results if you have a vector
> int and a vector float.
>

In this case, register pressure will likely to be overestimated,
resulting in more conservative code motion decision - but will still
be beneficial -- unlike the SPU case.

> I think it is better to use actual register classes and a target
> hook/macro to find the preferred register class for the mode, rather
> than the default grp/frp register class which you have, this will
> allow for the issue I am talking about with dealing with targets like
> SPU and targets which different register classes for vectors than from
> the integer and float registers.
>

Ok, will try to find a way to add more knowledge on the target
(without trying to become a register allocator :) ).

THanks,

David


> Thanks,
> Andrew Pinski


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