Re: [PATCH] PR target/38201: -mfma/-mavx and -msse5/-msse4a don't work together

[Uros Bizjak <ubizjak at gmail dot com>]

H.J. Lu wrote:

> > > Here is the updated patch for PR target/38201. I don't believe
> > > we should make arbitrary choices today for tomorrow's processors
> > > which we don't know anything about.  Disallow combination of
> > > -mfma/-mavx and -msse5/-msse4a won't prevent anyone from working on
> > > gcc to support any future processors.  We do have a concern that
> > > support for a new processor may take a long time to get into the
> > > released gcc.  To address this issue, we have been backporting new
> > > processor support to x86 vendor branches, which track released gcc,
> > > when needed.  I fullly expect those processors will be properly
> > > supported in gcc before they are launched. But arbitrary choices
> > > don't really help anyone and don't belong to a production compiler.
> > >
> > > OK for trunk?
> > >
> > >       
> > I think that this is wrong approach.
> >
> > As can be seen from enhanced testcases, -mavx works well with *all* other
> >     
>
> If you take a look at generated code, you will see that AVX instructions
> are used in SSE4a and SSE5 functions. They won't run on any current
> and known future processors.
>   

True, but we just instructed the compiler that we want AVX as well as 
SSE4a/5 instructions. Compiler did the correct job to intermix these two 
instruction sets and to use instructions from two otherwise orthogonal 
insn sets. This *was* in fact user's choice and the compiler blindly 
followed it.

Based on that, I don't think that compiler should intervene with user's 
choices and guide the user by limiting available compile flags. The fact 
that there is no silicon implementation should be of no importance here.


Uros.