Trying to port IRA to m32c, I realized that for some very specific
architectures a division of register classes on set of non-intersected
clases is a severe requirement (of Chaitin-Briggs graph coloring
algorithm). Although it is possible to achieve generation of correct
code with many small non-intersected register classes as in m32c case,
it is not worth of it because a lot of pseudos get memory and some
hard registers are not used. In other words, the RA quality is bad.
So I've decided to add Chow's priority coloring to IRA because it
can work on any pseudo register classes (intersected or not). The
following patch implements it. It modifies code assuming
non-intersected register classes. It is mainly in conflict building,
register pressure calculation, and cost calculations. The Chow's
priority coloring itself is implemented on the base of IRA
infrastructure and takes only 50 lines of C code (see function
ira-color.c::color_allocnos).
The patch also modifies semantics of -fira-algorithm and defines a
new option -fira-region. The first flag has a two values: CB meaning
Chaitin-Briggs coloring and priority meaning Chow's priority coloring.
The second flag defines RA regions:
o one meaning one RA region, in order words, a whole function as a
region;
o all meaning that all loops form RA regions;
o mixed meaning that only loops with high register pressure from RA
regions.
I think such options are more logical. If a port has a defined
IRA_COVER_CLASSES macro, the default algorithm is CB, otherwise the
default (and single possible algorithm is Chow's priority coloring).
By default RA regions are only loops with high register pressure
independently from the algorithm.
And finally, the patch has two parts specific for m32c. One is a fix
of a typo in REG_ALLOC_ORDER. And another one is to prohibit usage of
callee-saved likely spilled base registers for allocnos crossing
calls. M32c has 2 registers of class A_REGS which are used for
addressing. If a code for save/restore of such register is generated,
reload pass dies because we need one A_REG for addressing in
save/restore code for saving A_REG register, and one A_REG register
can be used explicitly in a call.
Theoretically, the patch should make working targets which were not
ported to IRA (which did not have defined macro IRA_COVER_CLASS). But
I checked only m32c. M32c has no additional regressions on gcc
testsuite with comparison of the old RA. The patch was also
successfully bootstrapped on x86, x86_64, itanium, and ppc64 with and
without BOOT_CFLAGS='-O2 -g -fira-algorithm=priority'. The patch
should not change the code generated earlier by IRA by default. I've
checked that on variety of tests on x86 and x86_64.
Is it ok to commit?
2008-11-28 Vladimir Makarov <vmakarov@redhat.com>
* doc/tm.texi (TARGET_IRA_COVER_CLASSES): Modify description.
* doc/invoke.texi (-fira-region): Describe new option.
(-fira-algorithm): Change the values.
* ira-conflicts.c (build_conflict_bit_table,
build_allocno_conflicts): Use ira_reg_classes_intersect_p.
(ira_build_conflicts): Use flag flag_ira_region instead of
flag_ira_algorithm. Prohibit usage of callee-saved likely spilled
base registers for allocnos crossing calls.
* flags.h (enum ira_algorithm): Redefine.
(enum ira_region): New.
(flag_ira_region): New.
* cfgloopanal.c (estimate_reg_pressure_cost): Use flag_ira_region
instead of flag_ira_algorithm.
* toplev.c (flag_ira_algorithm): Change the initial value.
(flag_ira_region): New.
* ira-int.h (ira_reg_classes_intersect_p,
ira_reg_class_super_classes): New.
* ira-color.c (update_copy_costs): Use
ira_reg_classes_intersect_p. Use right class to find hard reg
index.
(update_conflict_hard_regno_costs): Ditto. Add a new parameter.
(assign_hard_reg): Ditto. Pass additional argument to
update_conflict_hard_regno_costs. Do not uncoalesce for priority
coloring.
(allocno_priorities, setup_allocno_priorities,
allocno_priority_compare_func): Move before color_allocnos.
(color_allocnos): Add priority coloring. Use flag flag_ira_region
instead of flag_ira_algorithm.
(move_spill_restore): Check classes of the same reg allocno from
different regions.
(update_curr_costs): Use ira_reg_classes_intersect_p.
(ira_reassign_conflict_allocnos): Ditto.
* opts.c (decode_options): Always set up flag_ira. Set up
flag_ira_algorithm. Warn CB can not be used for architecture.
(common_handle_option): Modify code for -fira-algorithm. Add code
to process -fira-region.
* ira-lives.c (update_allocno_pressure_excess_length): Process
superclasses too.
(set_allocno_live, clear_allocno_live, mark_reg_live,
mark_reg_dead, process_bb_node_lives): Ditto.
* ira-build.c (propagate_allocno_info): Use flag flag_ira_region
instead of flag_ira_algorithm.
(allocno_range_compare_func): Ignore classes for priority
coloring.
(setup_min_max_conflict_allocno_ids): Ditto.
(ira_flattening): Use ira_reg_classes_intersect_p.
* genpreds.c (write_enum_constraint_num): Output
CONSTRAINT__LIMIT.
* common.opt (fira-algorithm): Modify.
(fira-region): New.
* ira.c (setup_class_hard_regs): Initialize.
(setup_cover_and_important_classes): Modify code setting class
related info for priority coloring.
(setup_class_translate): Ditto.
(ira_reg_classes_intersect_p, ira_reg_class_super_classes): New.
(setup_reg_class_intersect_union): Rename to
setup_reg_class_relations. Add code for setting up new variables.
(find_reg_class_closure): Do not check targetm.ira_cover_classes.
(ira): Use flag flag_ira_region instead of flag_ira_algorithm.
* ira-costs.c (common_classes): New.
(print_costs): Use flag flag_ira_region instead of
flag_ira_algorithm.
(find_allocno_class_costs): Ditto. Use common_classes. Translate
alt_class.
(ira_costs): Allocate/deallocate common_classes.
* config/m32c/m32.h (REG_ALLOC_ORDER): Add reg 19.