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Re: [PATCH,rs6000] fix ICE caused by lax rs6000_legitimize_address
On Tue, Nov 11, 2008 at 08:50:15AM -0500, David Edelsohn wrote:
> I have no objection to this type of patch during stage 3.
>
> Why create a [REG+REG] indexed form for these unaligned addresses
> instead of including the low-order bits in the sum created immediately
> prior? I think the logic can be hoisted to adjust low_int and high_int for
> PowerPC64.
>
> Also, as Pinski mentioned, the testcase is not PowerPC-specific.
Changed thusly. OK?
-Nathan
gcc/
* config/rs6000/rs6000.c (rs6000_legitimize_address): Check for
non-word-aligned REG+CONST addressing.
gcc/testsuite/
* gcc.c-torture/compile/20081111-1.c: New test.
Index: gcc/ChangeLog
===================================================================
Index: gcc/testsuite/gcc.c-torture/compile/20081111-1.c
===================================================================
--- gcc/testsuite/gcc.c-torture/compile/20081111-1.c (revision 0)
+++ gcc/testsuite/gcc.c-torture/compile/20081111-1.c (revision 0)
@@ -0,0 +1,22 @@
+struct a
+{
+ unsigned int x;
+ unsigned short y;
+} __attribute__((packed));
+
+struct b {
+ struct a rep;
+ unsigned long long seq;
+} __attribute__((packed));
+
+struct c {
+ int x;
+ struct a a[5460];
+ struct b b;
+};
+
+extern void use_ull(unsigned long long);
+extern void f(struct c *i) {
+ use_ull(i->b.seq);
+ return;
+}
Index: gcc/testsuite/ChangeLog
===================================================================
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 141763)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -3813,6 +3813,12 @@ rs6000_legitimize_address (rtx x, rtx ol
HOST_WIDE_INT high_int, low_int;
rtx sum;
low_int = ((INTVAL (XEXP (x, 1)) & 0xffff) ^ 0x8000) - 0x8000;
+ /* Using a REG+CONST 64-bit integer load on 64-bit platforms
+ requires that CONST be word-aligned. */
+ if (TARGET_POWERPC64
+ && (mode == DImode || mode == DDmode)
+ && (low_int & 0x3))
+ low_int &= (HOST_WIDE_INT) ~3;
high_int = INTVAL (XEXP (x, 1)) - low_int;
sum = force_operand (gen_rtx_PLUS (Pmode, XEXP (x, 0),
GEN_INT (high_int)), 0);