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[m32c] fix constraints in and/or optimizations
- From: DJ Delorie <dj at redhat dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Mon, 10 Nov 2008 14:37:24 -0500
- Subject: [m32c] fix constraints in and/or optimizations
This patch fixes some bugs in optimizing and/or into single bit
set/clear. Applied.
2008-11-10 DJ Delorie <dj@redhat.com>
* config/m32c/m32c.c (m32c_const_ok_for_constraint_p): Add ImB
constraint for single-bit-clear in lower byte of HI constant, vs
Imb which just ignores the upper byte.
* config/m32c/predicates.md (m32c_1mask8_operand): Use it.
* config/m32c/bitops.md (andhi3_16, andhi3_24): Use it.
(iorhi3_16): Check for single bit set, not single bit clear.
Index: config/m32c/predicates.md
===================================================================
--- config/m32c/predicates.md (revision 141745)
+++ config/m32c/predicates.md (working copy)
@@ -281,11 +281,11 @@
(define_predicate "m32c_1bit16_operand"
(and (match_operand 0 "const_int_operand")
(match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Ilw\")")))
(define_predicate "m32c_1mask8_operand"
(and (match_operand 0 "const_int_operand")
- (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Imb\")")))
+ (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"ImB\")")))
(define_predicate "m32c_1mask16_operand"
(and (match_operand 0 "const_int_operand")
(match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Imw\")")))
Index: config/m32c/m32c.c
===================================================================
--- config/m32c/m32c.c (revision 141745)
+++ config/m32c/m32c.c (working copy)
@@ -946,12 +946,17 @@ m32c_const_ok_for_constraint_p (HOST_WID
}
if (memcmp (str, "Imb", 3) == 0)
{
int b = exact_log2 ((value ^ 0xff) & 0xff);
return (b >= 0 && b <= 7);
}
+ if (memcmp (str, "ImB", 3) == 0)
+ {
+ int b = exact_log2 ((value ^ 0xffff) & 0xffff);
+ return (b >= 0 && b <= 7);
+ }
if (memcmp (str, "Ilw", 3) == 0)
{
int b = exact_log2 (value);
return (b >= 0 && b <= 15);
}
if (memcmp (str, "Imw", 3) == 0)
Index: config/m32c/bitops.md
===================================================================
--- config/m32c/bitops.md (revision 141745)
+++ config/m32c/bitops.md (working copy)
@@ -95,13 +95,13 @@
[(set_attr "flags" "n,n,sz,sz,sz,sz")]
)
(define_insn "andhi3_16"
[(set (match_operand:HI 0 "mra_operand" "=Sp,Sp,Rhi,RhiSd,??Rmm,RhiSd,??Rmm")
(and:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0")
- (match_operand:HI 2 "mrai_operand" "Imb,Imw,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))]
+ (match_operand:HI 2 "mrai_operand" "ImB,Imw,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))]
"TARGET_A16"
"@
bclr\t%B2,%0
bclr\t%B2-8,1+%0
bclr\t%B2,%0
@@ -156,13 +156,13 @@
[(set_attr "flags" "n,n,sz,sz,sz,sz")]
)
(define_insn "iorhi3_16"
[(set (match_operand:HI 0 "mra_operand" "=Sp,Sp,Rhi,RhiSd,RhiSd,??Rmm,??Rmm")
(ior:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0")
- (match_operand:HI 2 "mrai_operand" "Imb,Imw,Ilw,iRhiSd,?Rmm,iRhiSd,?Rmm")))]
+ (match_operand:HI 2 "mrai_operand" "Ilb,Ilw,Ilw,iRhiSd,?Rmm,iRhiSd,?Rmm")))]
"TARGET_A16"
"@
bset %B2,%0
bset\t%B2-8,1+%0
bset\t%B2,%0
or.w\t%X2,%0
@@ -189,13 +189,13 @@
[(set_attr "flags" "n,n,sz,sz,sz,sz")]
)
(define_insn "andhi3_24"
[(set (match_operand:HI 0 "mra_operand" "=Sd,Sd,Rqi,Rqi,RhiSd,??Rmm,RhiSd,??Rmm")
(and:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0,0")
- (match_operand:HI 2 "mrai_operand" "Imb,Imw,Imb,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))]
+ (match_operand:HI 2 "mrai_operand" "ImB,Imw,ImB,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))]
"TARGET_A24"
"@
bclr\t%B2,%0
bclr\t%B2-8,1+%0
bclr\t%B2,%h0
bclr\t%B2-8,%H0