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Re: [PATCH] Detect L2 cache size for x86
- From: "Zuxy Meng" <zuxy dot meng at gmail dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Fri, 21 Mar 2008 10:37:34 +0800
- Subject: Re: [PATCH] Detect L2 cache size for x86
- References: <frolpo$13o$1@ger.gmane.org>
- Reply-to: "Zuxy Meng" <zuxy dot meng at gmail dot com>
"Zuxy Meng" <zuxy.meng@gmail.com> ååæææé:frolpo$13o$1@ger.gmane.org...
Hello,
The attached patch detects automatically the L2 cache size of a host x86
CPU, following what has already been done for L1 cache. Two schemes are
utilized in the detection: AMD CPUs will use CPUID function 0x80000006,
and
Intel CPUs will try both CPUID function 0x2 and 0x80000006. CPUID function
0x2 is a bit complex to decode and IMHO Intel is unlikely to abandon
function 0x80000006 for its future products. By trying both for Intel we
can
avoid adding more L2 cache descriptors to the decoding function.
Ping...
--
Zuxy