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Re: RFA: PR 34415: dbr_schedule vs. uninitialised registers

Eric Botcazou wrote:
Indeed, using LR would fix it.  The code was assuming that LIVE OUT is
the union of the LIVE IN sets (so no register can become live just be
crossing a BB), but this is true only of LR.

OK, that's my understanding too.

... you aren't looking at the whole story.  resource.c looks at IN sets,
not OUT sets, so you should compare LIVE and LR IN for basic block 3.

Basic block 2 if I'm not mistaken:

;; Start of basic block ( 0) -> 2
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u-1(29){ }}
;; lr  in  	 4 [$4] 8 [$8] 28 [$28] 29 [$sp] 31 [$31]
;; lr  use 	 29 [$sp]
;; lr  def 	 6 [$6] 7 [$7] 9 [$9] 10 [$10]
;; live  in  	 4 [$4] 31 [$31]
;; live  gen 	 6 [$6] 7 [$7] 9 [$9] 10 [$10]
;; live  kill	

That's the entry of the function. You have to compare the sets for the head of the loop.


   First find the set of uses for registers that are reachable from
   the entry block without passing thru a definition.  In and out
   bitvectors are built for each basic block.  The regnum is used to
   index into these sets.  See df.h for details.

Then the in and out sets here are the anded results of the in and
out sets from the lr and ur
problems. ----------------------------------------------------------------------------*/

But there is no UR problem:

You're right. In fact, it's not there explicitly, but UR is more or less what is described in the first paragraph. I'll fix the docs.


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