Re: init_reg_autoinc bug and how to describe regs that can't autoincdec

[kenner at vlsi1 dot ultra dot nyu dot edu (Richard Kenner)]

> I need to rephrase my question: how should this code change to
> also work for (as in: guide register allocation away from) a
> register class that can't be used for autoincdec but doesn't
> need secondary reloads?
> 
> I mean, by naming, by the head comment and at a glance it seems
> it's generally intended to guide register allocation regarding
> autoincdec, but can currently only help in an obscure case which
> you say probably even isn't useful anymore.  Why not improve it?

Because that's not what it means.  The most relevant comment is in regclass.c:

/* If we have auto-increment or auto-decrement and we can have secondary
   reloads, we are not allowed to use classes requiring secondary
   reloads for pseudos auto-incremented since reload can't handle it.  */

"not allowed" means literally that: we can't *allow* the pseudo to end up
in such a reg class.  Here, we can allow it, but we prefer that we not
do that.  That needs another mechanism since regclass.c currently doesn't
distinguish between those cases.

Here's a completely untested (not even compiled) patch that suggests a
mechanism that I'd recommend:

*** tm.texi.old	Thu Nov 22 09:01:22 2007
--- tm.texi	Thu Nov 22 09:05:03 2007
***************
*** 2434,2437 ****
--- 2434,2444 ----
  @end defmac
  
+ @defmac NONINCDEC_BASE_REG_CLASS
+ A macro which is similar to @code{BASE_REG_CLASS}, but is the name of
+ a class to which a register used in a @code{PRE_INC} or similar
+ operation must belong.  On most machines, this is the same as
+ @code{BASE_REG_CLASS}; if so, you should not define this macro.
+ @end defmac
+ 
  @defmac MODE_BASE_REG_CLASS (@var{mode})
  This is a variation of the @code{BASE_REG_CLASS} macro which allows
*** regclass.c.old	Fri Aug 24 07:51:13 2007
--- regclass.c	Thu Nov 22 08:59:39 2007
*************** copy_cost (rtx x, enum machine_mode mode
*** 1959,1964 ****
     in a subexpression of a memory address, X.
  
!    If CONTEXT is 0, we are looking at the base part of an address, otherwise we
!    are looking at the index part.
  
     MODE is the mode of the memory reference; OUTER_CODE and INDEX_CODE
--- 1959,1965 ----
     in a subexpression of a memory address, X.
  
!    If CONTEXT is 0, we are looking at the base part of an address, if 1, we
!    are looking at the index part, if 2, we are looking at something inside
!    a PRE_INC or similar.
  
     MODE is the mode of the memory reference; OUTER_CODE and INDEX_CODE
*************** record_address_regs (enum machine_mode m
*** 1979,1982 ****
--- 1980,1987 ----
    if (context == 1)
      class = INDEX_REG_CLASS;
+ #ifdef NONINCDEC_BASE_REG_CLASS
+   else if (context == 2)
+     class = NONINCDEC_BASE_REG_CLASS;
+ #endif
    else
      class = base_reg_class (mode, outer_code, index_code);
*************** record_address_regs (enum machine_mode m
*** 2103,2107 ****
      case POST_MODIFY:
      case PRE_MODIFY:
!       record_address_regs (mode, XEXP (x, 0), 0, code,
  			   GET_CODE (XEXP (XEXP (x, 1), 1)), 2 * scale);
        if (REG_P (XEXP (XEXP (x, 1), 1)))
--- 2108,2112 ----
      case POST_MODIFY:
      case PRE_MODIFY:
!       record_address_regs (mode, XEXP (x, 0), 2, code,
  			   GET_CODE (XEXP (XEXP (x, 1), 1)), 2 * scale);
        if (REG_P (XEXP (XEXP (x, 1), 1)))
*************** record_address_regs (enum machine_mode m
*** 2125,2129 ****
  #endif
  
!       record_address_regs (mode, XEXP (x, 0), 0, code, SCRATCH, 2 * scale);
        break;
  
--- 2130,2134 ----
  #endif
  
!       record_address_regs (mode, XEXP (x, 0), 2, code, SCRATCH, 2 * scale);
        break;