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Fix PR tree-optimization/34046


This is another item in the series "negative edge probabilities out of integer 
overflow", a regression present at -O3 on the mainline.  If several incoming 
edges of a basic block are to be threaded, update_bb_profile_for_threading is 
invoked several times and rescales the edges probabilities each time; these 
can quickly become very low and, at this point, quirks related to integer 
division can seriously come into play.

This has already been accounted for in the scaling loop:

      FOR_EACH_EDGE (c, ei, bb->succs)
	{
	  c->probability = RDIV (c->probability * scale, 65536);
	  if (c->probability > REG_BR_PROB_BASE)
	    c->probability = REG_BR_PROB_BASE;
	}

Theoritically, c->probability can never be greater than REG_BR_PROB_BASE but, 
in practice, it can if c->probability was greater than the new base; this 
latter case can theoritically never happen but, in practice, it also does for 
the reasons explained above.  Now, in the latter case, if the new base is 
very small, c->probability * scale will overflow and the division yields a 
negative result.

Fixed by avoiding the division in this case, tested on x86_64-suse-linux, 
applied on the mainline as obvious.


2007-11-14  Eric Botcazou  <ebotcazou@libertysurf.fr>

	PR tree-optimization/34046
	* cfg.c (update_bb_profile_for_threading): Avoid the division for the
	scaling if the old probability is greater than the new base.


2007-11-14  Eric Botcazou  <ebotcazou@libertysurf.fr>

	* gcc.c-torture/compile/20071114-1.c: New test.


-- 
Eric Botcazou
Index: cfg.c
===================================================================
--- cfg.c	(revision 130131)
+++ cfg.c	(working copy)
@@ -990,9 +990,15 @@ update_bb_profile_for_threading (basic_b
 
       FOR_EACH_EDGE (c, ei, bb->succs)
 	{
-	  c->probability = RDIV (c->probability * scale, 65536);
-	  if (c->probability > REG_BR_PROB_BASE)
+	  /* Protect from overflow due to additional scaling.  */
+	  if (c->probability > prob)
 	    c->probability = REG_BR_PROB_BASE;
+	  else
+	    {
+	      c->probability = RDIV (c->probability * scale, 65536);
+	      if (c->probability > REG_BR_PROB_BASE)
+		c->probability = REG_BR_PROB_BASE;
+	    }
 	}
     }
 
/* PR tree-optimization/34046 */
/* Origin: dcb <dcb314@hotmail.com> */

typedef unsigned char bool8;
typedef unsigned char uint8_t;
typedef unsigned short int uint16_t;
typedef unsigned int uint32_t;
typedef uint8_t uint8;
typedef uint16_t uint16;
typedef uint32_t uint32;

struct SIAPU
{
    uint8 *PC;
    uint8 *RAM;
    uint8 Bit;
    uint32 Address;
    uint8 *WaitAddress1;
    uint8 *WaitAddress2;
    uint8 _Carry;
};

struct SAPU
{
    bool8 ShowROM;
    uint8 OutPorts [4];
    uint8 ExtraRAM [64];
    uint16 TimerTarget [3];
};

struct SAPU APU;
struct SIAPU IAPU;

void S9xSetAPUControl (uint8 byte);
void S9xSetAPUDSP (uint8 byte);
uint8 S9xGetAPUDSP ();

uint8 S9xAPUGetByte (uint32 Address)
{
  Address &= 0xffff;

  if (Address <= 0xff && Address >= 0xf0)
    {
      if (Address >= 0xf4 && Address <= 0xf7)
	{
	  IAPU.WaitAddress2 = IAPU.WaitAddress1;
	  IAPU.WaitAddress1 = IAPU.PC;
	  return (IAPU.RAM [Address]);
	}
      else if (Address == 0xf3)
	return (S9xGetAPUDSP ());

      if (Address >= 0xfd)
	{
	  IAPU.WaitAddress2 = IAPU.WaitAddress1;
	  IAPU.WaitAddress1 = IAPU.PC;
	  uint8 t = IAPU.RAM [Address];
	  IAPU.RAM [Address] = 0;
	  return (t);
	}

      return (IAPU.RAM [Address]);
    }
 else
   return (IAPU.RAM [Address]);
}

void S9xAPUSetByte (uint8 byte, uint32 Address)
{
  Address &= 0xffff;

  if (Address <= 0xff && Address >= 0xf0)
    {
      if (Address == 0xf3)
	S9xSetAPUDSP (byte);
      else if (Address >= 0xf4 && Address <= 0xf7)
	APU.OutPorts [Address - 0xf4] = byte;
      else if (Address == 0xf1)
	S9xSetAPUControl (byte);
      else if (Address < 0xfd)
	{
	  IAPU.RAM [Address] = byte;
	  if (Address >= 0xfa)
	    {
	      if (byte == 0)
		APU.TimerTarget [Address - 0xfa] = 0x100;
	      else
		APU.TimerTarget [Address - 0xfa] = byte;
	    }
	}
    }
  else
    {
      if (Address < 0xffc0)
	IAPU.RAM [Address] = byte;
      else
	{
	  APU.ExtraRAM [Address - 0xffc0] = byte;
	  if (!APU.ShowROM)
	    IAPU.RAM [Address] = byte;
	}
    }
}

void ApuCA ()
{
  IAPU.Address = *(uint16 *) (IAPU.PC + 1);
  IAPU.Bit = (uint8)(IAPU.Address >> 13);
  if ((IAPU._Carry))
    S9xAPUSetByte (S9xAPUGetByte (IAPU.Address) | (1 << IAPU.Bit), IAPU.Address);
  else
    S9xAPUSetByte (S9xAPUGetByte (IAPU.Address) & ~(1 << IAPU.Bit), IAPU.Address);
}

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